forked from Mirrors/tinycc
i386: Fix various testsuite issues
on 32bit long long support was sometimes broken. This fixes code-gen for long long values in switches, disables a x86-64 specific testcase and avoid an undefined shift amount. It comments out a bitfield test involving long long bitfields > 32 bit; with GCC layout they can straddle multiple words and code generation isn't prepared for this.master
parent
3980e07fe5
commit
cd9514abc4
29
i386-gen.c
29
i386-gen.c
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@ -694,14 +694,27 @@ ST_FUNC void gjmp_addr(int a)
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ST_FUNC void gtst_addr(int inv, int a)
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ST_FUNC void gtst_addr(int inv, int a)
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{
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{
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inv ^= (vtop--)->c.i;
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int v = vtop->r & VT_VALMASK;
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a -= ind + 2;
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if (v == VT_CMP) {
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if (a == (char)a) {
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inv ^= (vtop--)->c.i;
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g(inv - 32);
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a -= ind + 2;
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g(a);
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if (a == (char)a) {
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} else {
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g(inv - 32);
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g(0x0f);
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g(a);
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oad(inv - 16, a - 4);
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} else {
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g(0x0f);
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oad(inv - 16, a - 4);
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}
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} else if ((v & ~1) == VT_JMP) {
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if ((v & 1) != inv) {
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gjmp_addr(a);
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gsym(vtop->c.i);
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} else {
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gsym(vtop->c.i);
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o(0x05eb);
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gjmp_addr(a);
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}
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vtop--;
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}
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}
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}
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}
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@ -610,7 +610,7 @@ struct S_enum {
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enum ELong {
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enum ELong {
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/* This is either 0 on L32 machines, or a large number
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/* This is either 0 on L32 machines, or a large number
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on L64 machines. We should be able to store this. */
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on L64 machines. We should be able to store this. */
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EL_large = (unsigned long)0xf000 << 32,
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EL_large = ((unsigned long)0xf000 << 31) << 1,
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};
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};
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enum { BIASU = -1U<<31 };
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enum { BIASU = -1U<<31 };
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@ -2028,6 +2028,11 @@ void bitfield_test(void)
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else
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else
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printf("st1.f2 != -1\n");
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printf("st1.f2 != -1\n");
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#ifndef __i386__
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/* on i386 we don't correctly support long long bit-fields.
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The bitfields can straddle long long boundaries (at least with
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GCC bitfield layout) and code generation isn't prepared for this
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(would have to work with two words in that case). */
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/* bit sizes below must be bigger than 32 since GCC doesn't allow
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/* bit sizes below must be bigger than 32 since GCC doesn't allow
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long-long bitfields whose size is not bigger than int */
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long-long bitfields whose size is not bigger than int */
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struct sbf2 {
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struct sbf2 {
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@ -2042,6 +2047,19 @@ void bitfield_test(void)
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st2.f3 = a;
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st2.f3 = a;
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st2.f2++;
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st2.f2++;
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printf("%lld %lld %lld\n", st2.f1, st2.f2, st2.f3);
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printf("%lld %lld %lld\n", st2.f1, st2.f2, st2.f3);
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#endif
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#if 0
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Disabled for now until further clarification re GCC compatibility
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struct sbf3 {
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int f1 : 7;
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int f2 : 1;
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char f3;
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int f4 : 8;
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int f5 : 1;
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int f6 : 16;
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} st3;
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printf("sizeof(st3) = %d\n", sizeof(st3));
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#endif
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}
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}
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#ifdef __x86_64__
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#ifdef __x86_64__
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@ -3100,7 +3118,7 @@ void other_constraints_test(void)
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{
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{
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unsigned long ret;
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unsigned long ret;
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int var;
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int var;
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__asm__ volatile ("movq %P1,%0" : "=r" (ret) : "p" (&var));
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__asm__ volatile ("mov %P1,%0" : "=r" (ret) : "p" (&var));
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printf ("oc1: %d\n", ret == (unsigned long)&var);
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printf ("oc1: %d\n", ret == (unsigned long)&var);
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}
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}
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@ -3182,6 +3200,7 @@ void test_high_clobbers(void)
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static long cpu_number;
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static long cpu_number;
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void trace_console(long len, long len2)
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void trace_console(long len, long len2)
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{
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{
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#ifdef __x86_64__
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/* This generated invalid code when the emission of the switch
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/* This generated invalid code when the emission of the switch
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table isn't disabled. The asms are necessary to show the bug,
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table isn't disabled. The asms are necessary to show the bug,
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normal statements don't work (they need to generate some code
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normal statements don't work (they need to generate some code
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@ -3228,6 +3247,7 @@ void trace_console(long len, long len2)
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{
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{
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printf("huh?\n");
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printf("huh?\n");
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}
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}
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#endif
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}
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}
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void asm_test(void)
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void asm_test(void)
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{
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{
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29
x86_64-gen.c
29
x86_64-gen.c
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@ -1721,14 +1721,27 @@ void gjmp_addr(int a)
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ST_FUNC void gtst_addr(int inv, int a)
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ST_FUNC void gtst_addr(int inv, int a)
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{
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{
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inv ^= (vtop--)->c.i;
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int v = vtop->r & VT_VALMASK;
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a -= ind + 2;
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if (v == VT_CMP) {
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if (a == (char)a) {
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inv ^= (vtop--)->c.i;
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g(inv - 32);
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a -= ind + 2;
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g(a);
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if (a == (char)a) {
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} else {
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g(inv - 32);
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g(0x0f);
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g(a);
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oad(inv - 16, a - 4);
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} else {
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g(0x0f);
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oad(inv - 16, a - 4);
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}
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} else if ((v & ~1) == VT_JMP) {
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if ((v & 1) != inv) {
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gjmp_addr(a);
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gsym(vtop->c.i);
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} else {
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gsym(vtop->c.i);
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o(0x05eb);
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gjmp_addr(a);
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}
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vtop--;
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}
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}
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}
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}
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