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added 'A' asm constraint

tcc-xref
bellard 2003-04-14 22:22:54 +00:00
parent 6e197e3d5d
commit 4149fedd7b
1 changed files with 30 additions and 5 deletions
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35
i386-asm.c
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@ -710,27 +710,30 @@ static inline int constraint_priority(const char *str)
break; break;
str++; str++;
switch(c) { switch(c) {
case 'A':
pr = 0;
break;
case 'a': case 'a':
case 'b': case 'b':
case 'c': case 'c':
case 'd': case 'd':
case 'S': case 'S':
case 'D': case 'D':
pr = 0;
break;
case 'q':
pr = 1; pr = 1;
break; break;
case 'r': case 'q':
pr = 2; pr = 2;
break; break;
case 'r':
pr = 3;
break;
case 'N': case 'N':
case 'M': case 'M':
case 'I': case 'I':
case 'i': case 'i':
case 'm': case 'm':
case 'g': case 'g':
pr = 3; pr = 4;
break; break;
default: default:
error("unknown constraint '%c'", c); error("unknown constraint '%c'", c);
@ -817,6 +820,15 @@ static void asm_compute_constraints(uint8_t *regs_allocated,
try_next: try_next:
c = *str++; c = *str++;
switch(c) { switch(c) {
case 'A':
/* allocate both eax and edx */
if (regs_allocated[TREG_EAX] || regs_allocated[TREG_EDX])
goto try_next;
op->is_llong = 1;
op->reg = TREG_EAX;
regs_allocated[TREG_EAX] = 1;
regs_allocated[TREG_EDX] = 1;
break;
case 'a': case 'a':
reg = TREG_EAX; reg = TREG_EAX;
goto alloc_reg; goto alloc_reg;
@ -854,6 +866,7 @@ static void asm_compute_constraints(uint8_t *regs_allocated,
goto try_next; goto try_next;
reg_found: reg_found:
/* now we can reload in the register */ /* now we can reload in the register */
op->is_llong = 0;
op->reg = reg; op->reg = reg;
regs_allocated[reg] = 1; regs_allocated[reg] = 1;
break; break;
@ -1027,6 +1040,12 @@ static void asm_gen_code(ASMOperand *operands, int nb_operands,
op = &operands[i]; op = &operands[i];
if (op->reg >= 0) { if (op->reg >= 0) {
load(op->reg, op->vt); load(op->reg, op->vt);
if (op->is_llong) {
SValue sv;
sv = *op->vt;
sv.c.ul += 4;
load(TREG_EDX, &sv);
}
} }
} }
/* generate load code for output memory references */ /* generate load code for output memory references */
@ -1045,6 +1064,12 @@ static void asm_gen_code(ASMOperand *operands, int nb_operands,
op = &operands[i]; op = &operands[i];
if (op->reg >= 0 && ((op->vt->r & VT_VALMASK) != VT_LLOCAL)) { if (op->reg >= 0 && ((op->vt->r & VT_VALMASK) != VT_LLOCAL)) {
store(op->reg, op->vt); store(op->reg, op->vt);
if (op->is_llong) {
SValue sv;
sv = *op->vt;
sv.c.ul += 4;
store(TREG_EDX, &sv);
}
} }
} }
/* generate reg restore code */ /* generate reg restore code */