forked from Mirrors/tinycc
254 lines
4.0 KiB
C
254 lines
4.0 KiB
C
/* ------------------------------------------------------------------ */
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/* WARNING: relative order of tokens is important. */
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/* register */
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DEF_ASM(al)
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DEF_ASM(cl)
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DEF_ASM(dl)
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DEF_ASM(bl)
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DEF_ASM(ah)
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DEF_ASM(ch)
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DEF_ASM(dh)
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DEF_ASM(bh)
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DEF_ASM(ax)
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DEF_ASM(cx)
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DEF_ASM(dx)
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DEF_ASM(bx)
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DEF_ASM(sp)
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DEF_ASM(bp)
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DEF_ASM(si)
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DEF_ASM(di)
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DEF_ASM(eax)
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DEF_ASM(ecx)
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DEF_ASM(edx)
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DEF_ASM(ebx)
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DEF_ASM(esp)
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DEF_ASM(ebp)
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DEF_ASM(esi)
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DEF_ASM(edi)
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#ifdef TCC_TARGET_X86_64
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DEF_ASM(rax)
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DEF_ASM(rcx)
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DEF_ASM(rdx)
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DEF_ASM(rbx)
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DEF_ASM(rsp)
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DEF_ASM(rbp)
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DEF_ASM(rsi)
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DEF_ASM(rdi)
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#endif
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DEF_ASM(mm0)
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DEF_ASM(mm1)
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DEF_ASM(mm2)
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DEF_ASM(mm3)
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DEF_ASM(mm4)
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DEF_ASM(mm5)
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DEF_ASM(mm6)
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DEF_ASM(mm7)
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DEF_ASM(xmm0)
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DEF_ASM(xmm1)
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DEF_ASM(xmm2)
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DEF_ASM(xmm3)
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DEF_ASM(xmm4)
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DEF_ASM(xmm5)
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DEF_ASM(xmm6)
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DEF_ASM(xmm7)
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DEF_ASM(cr0)
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DEF_ASM(cr1)
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DEF_ASM(cr2)
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DEF_ASM(cr3)
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DEF_ASM(cr4)
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DEF_ASM(cr5)
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DEF_ASM(cr6)
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DEF_ASM(cr7)
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DEF_ASM(tr0)
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DEF_ASM(tr1)
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DEF_ASM(tr2)
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DEF_ASM(tr3)
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DEF_ASM(tr4)
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DEF_ASM(tr5)
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DEF_ASM(tr6)
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DEF_ASM(tr7)
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DEF_ASM(db0)
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DEF_ASM(db1)
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DEF_ASM(db2)
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DEF_ASM(db3)
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DEF_ASM(db4)
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DEF_ASM(db5)
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DEF_ASM(db6)
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DEF_ASM(db7)
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DEF_ASM(dr0)
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DEF_ASM(dr1)
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DEF_ASM(dr2)
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DEF_ASM(dr3)
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DEF_ASM(dr4)
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DEF_ASM(dr5)
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DEF_ASM(dr6)
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DEF_ASM(dr7)
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DEF_ASM(es)
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DEF_ASM(cs)
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DEF_ASM(ss)
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DEF_ASM(ds)
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DEF_ASM(fs)
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DEF_ASM(gs)
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DEF_ASM(st)
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DEF_ASM(rip)
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#ifdef TCC_TARGET_X86_64
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/* The four low parts of sp/bp/si/di that exist only on
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x86-64 (encoding aliased to ah,ch,dh,dh when not using REX). */
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DEF_ASM(spl)
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DEF_ASM(bpl)
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DEF_ASM(sil)
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DEF_ASM(dil)
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#endif
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/* generic two operands */
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DEF_BWLX(mov)
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DEF_BWLX(add)
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DEF_BWLX(or)
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DEF_BWLX(adc)
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DEF_BWLX(sbb)
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DEF_BWLX(and)
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DEF_BWLX(sub)
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DEF_BWLX(xor)
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DEF_BWLX(cmp)
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/* unary ops */
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DEF_BWLX(inc)
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DEF_BWLX(dec)
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DEF_BWLX(not)
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DEF_BWLX(neg)
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DEF_BWLX(mul)
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DEF_BWLX(imul)
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DEF_BWLX(div)
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DEF_BWLX(idiv)
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DEF_BWLX(xchg)
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DEF_BWLX(test)
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/* shifts */
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DEF_BWLX(rol)
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DEF_BWLX(ror)
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DEF_BWLX(rcl)
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DEF_BWLX(rcr)
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DEF_BWLX(shl)
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DEF_BWLX(shr)
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DEF_BWLX(sar)
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DEF_WLX(shld)
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DEF_WLX(shrd)
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DEF_ASM(pushw)
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DEF_ASM(pushl)
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#ifdef TCC_TARGET_X86_64
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DEF_ASM(pushq)
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#endif
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DEF_ASM(push)
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DEF_ASM(popw)
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DEF_ASM(popl)
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#ifdef TCC_TARGET_X86_64
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DEF_ASM(popq)
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#endif
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DEF_ASM(pop)
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DEF_BWL(in)
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DEF_BWL(out)
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DEF_WLX(movzb)
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DEF_ASM(movzwl)
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DEF_ASM(movsbw)
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DEF_ASM(movsbl)
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DEF_ASM(movswl)
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#ifdef TCC_TARGET_X86_64
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DEF_ASM(movsbq)
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DEF_ASM(movswq)
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DEF_ASM(movzwq)
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DEF_ASM(movslq)
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#endif
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DEF_WLX(lea)
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DEF_ASM(les)
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DEF_ASM(lds)
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DEF_ASM(lss)
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DEF_ASM(lfs)
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DEF_ASM(lgs)
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DEF_ASM(call)
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DEF_ASM(jmp)
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DEF_ASM(lcall)
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DEF_ASM(ljmp)
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DEF_ASMTEST(j,)
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DEF_ASMTEST(set,)
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DEF_ASMTEST(set,b)
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DEF_ASMTEST(cmov,)
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DEF_WLX(bsf)
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DEF_WLX(bsr)
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DEF_WLX(bt)
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DEF_WLX(bts)
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DEF_WLX(btr)
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DEF_WLX(btc)
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DEF_WLX(lar)
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DEF_WLX(lsl)
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/* generic FP ops */
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DEF_FP(add)
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DEF_FP(mul)
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DEF_ASM(fcom)
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DEF_ASM(fcom_1) /* non existent op, just to have a regular table */
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DEF_FP1(com)
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DEF_FP(comp)
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DEF_FP(sub)
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DEF_FP(subr)
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DEF_FP(div)
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DEF_FP(divr)
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DEF_BWLX(xadd)
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DEF_BWLX(cmpxchg)
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/* string ops */
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DEF_BWLX(cmps)
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DEF_BWLX(scmp)
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DEF_BWL(ins)
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DEF_BWL(outs)
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DEF_BWLX(lods)
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DEF_BWLX(slod)
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DEF_BWLX(movs)
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DEF_BWLX(smov)
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DEF_BWLX(scas)
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DEF_BWLX(ssca)
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DEF_BWLX(stos)
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DEF_BWLX(ssto)
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/* generic asm ops */
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#define ALT(x)
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#define DEF_ASM_OP0(name, opcode) DEF_ASM(name)
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#define DEF_ASM_OP0L(name, opcode, group, instr_type)
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#define DEF_ASM_OP1(name, opcode, group, instr_type, op0)
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#define DEF_ASM_OP2(name, opcode, group, instr_type, op0, op1)
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#define DEF_ASM_OP3(name, opcode, group, instr_type, op0, op1, op2)
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#ifdef TCC_TARGET_X86_64
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# include "x86_64-asm.h"
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#else
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# include "i386-asm.h"
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#endif
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#define ALT(x)
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#define DEF_ASM_OP0(name, opcode)
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#define DEF_ASM_OP0L(name, opcode, group, instr_type) DEF_ASM(name)
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#define DEF_ASM_OP1(name, opcode, group, instr_type, op0) DEF_ASM(name)
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#define DEF_ASM_OP2(name, opcode, group, instr_type, op0, op1) DEF_ASM(name)
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#define DEF_ASM_OP3(name, opcode, group, instr_type, op0, op1, op2) DEF_ASM(name)
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#ifdef TCC_TARGET_X86_64
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# include "x86_64-asm.h"
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#else
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# include "i386-asm.h"
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#endif
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