Commit Graph

250 Commits (5692716770e9e2e733d0e7ab6ce0bd70cb830aba)

Author SHA1 Message Date
Michael Matz 5692716770 x86-asm: Fix lar opcode operands
lar can accept multiple sizes as well (wlx), like lsl.  When using
autosize it's important to look at the destination operand first;
when it's a register that one determines the size, not the input
operand.
2016-12-15 17:47:08 +01:00
Michael Matz 6a5ec8cb3c x86-asm: More opcodes
Some new opcodes and some aliases: ljmp[wl], prefetch{nta,t0,t1,t2},
bswap[lq], sysretq, swapgs.
2016-12-15 17:47:08 +01:00
Michael Matz d9d029006c x86-asm: Add [sl][ig]dtq opcodes
GAS has alias lgdtq for lgdt (similar for saves and GDT).  It doesn't
have the same for LDT.
2016-12-15 17:47:08 +01:00
Michael Matz f6c1eb10e2 x86-asm: Implement fxrstorq and fxsaveq 2016-12-15 17:47:08 +01:00
Michael Matz 2b618c1ab4 Fix parsing attributes for struct decls
Given this code:

  struct __attribute__((...)) Name {...};

TCC was eating "Name", hence generating an anonymous struct.
It also didn't apply any packed attributes to the parsed
members.  Both fixed.  The testcase also contains a case
that isn't yet handled by TCC (under a BROKEN #define).
2016-12-15 17:47:08 +01:00
Michael Matz 7e51546624 x86-asm: Implement clflush opcode 2016-12-15 17:47:08 +01:00
Michael Matz bbce31552e inline asm: accept concatenated strings in constraints
This really should be handled implicitly in the preprocessor,
but for now this is enough.
2016-12-15 17:47:08 +01:00
Michael Matz 10c3514889 Accept symbols in initializers also on 64 bit
Those should use long or long long type, and generate a 64bit reloc.
2016-12-15 17:47:07 +01:00
Michael Matz 920474115c x86-64-asm: More opcodes
Implement some more opcodes, syscall, sysret, lfence, mfence, sfence.
2016-12-15 17:47:07 +01:00
Michael Matz 1a5eacb445 tccasm: Implement compare expressions
I.e. implement < > <= >= == !=.  Comparisons are signed and result
is -1 if true, 0 if false.
2016-12-15 17:47:07 +01:00
Michael Matz ff5561ff7d x86-64-asm: Accept expressions for .quad
The x86-64 target has 64bit relocs, and hence can accept
generic expressions for '.quad'.
2016-12-15 17:47:07 +01:00
Michael Matz 253afeed1e inline asm: Accept 'p' constraint and 'P' template mod
'p' is conservatively the same as 'r' and 'P' as template
modifier can be ignored in TCC.
2016-12-15 17:47:07 +01:00
Michael Matz 63e3ff7cca tccasm: Accept .balign 2016-12-15 17:47:07 +01:00
Michael Matz 8e4da42384 Accept more asm expressions
In particular subtracting a defined symbol from current section
makes the value PC relative, and .org accepts symbolic expressions
as well, if the symbol is from the current section.
2016-12-15 17:47:07 +01:00
Michael Matz c82e52d55b tccasm: Implement .pushsection and .popsection 2016-12-15 17:47:06 +01:00
Michael Matz 6763b02abc Accept empty struct member decls
struct S { /*nothing*/; int a; };

is an acceptable struct declaration, there may be stray semicolons
in the member list.
2016-12-15 17:47:06 +01:00
Michael Matz d5d881d9e9 x86-asm: Accept 'q' modifier
In inline extended asm '%q1' refers to the 64bit register of operand 1.
2016-12-15 17:47:06 +01:00
Michael Matz 38e5cf0983 tccpp: Fix macro_is_equal
When tokens in macro definitions need cstr_buf inside get_tok_str,
the second might overwrite the first (happens when tokens are
multi-character non-identifiers, see testcase) in macro_is_equal,
failing to diagnose a difference.  Use a real local buffer.
2016-12-15 17:47:05 +01:00
Michael Matz 4094f7c5fc x86-64-asm: Tidy 2016-12-15 17:47:05 +01:00
Michael Matz 58963828ab x86-asm: Correct mem64->xmm movq
Now we can express prefixes with 0x0fxx opcodes we can correct the
movq mem64->xmm opcode, and restrict the movq xmm->mem64 movq to
not invalidly accept mmx.
2016-12-15 17:47:05 +01:00
Michael Matz ed35ac841b x86-asm: Add more SSE2 instructions
In particular those that are extensions of existing mmx (or sse1)
instructions by a simple 0x66 prefix.  There's one caveat for
x86-64: as we don't yet correctly handle the 0xf3 prefix
the movq mem64->xmm is wrong (tested in asmtest.S).  Needs
some refactoring of the instr_type member.
2016-12-15 17:47:05 +01:00
grischka 2b7ee000cd tests: add .so/.dll creation test
Also remove bitfield test from tcctest.c because gcc
versions don't agree among each other.
2016-12-15 17:04:07 +01:00
grischka ca92bfc3c6 tccelf: some linker cleanup
- generate and use SYM@PLT for plt addresses
- get rid of patch_dynsym_undef hack (no idea what it did on FreeBSD)
- use sym_attrs instead of symtab_to_dynsym
- special case for function pointers into .so on i386
- libtcc_test: test tcc_add_symbol with data object
- move target specicic code to *-link.c files
- add R_XXX_RELATIVE (needed for PE)
2016-12-15 17:01:22 +01:00
David Mertens d2e2f42382 Implement gcc bitfield algorithm; add -mms-bitfields 2016-11-28 09:01:12 -05:00
grischka 4a3741bf02 x86_64-asm: =m operand fixes
The problem was with tcctest.c:

    unsigned set;
    __asm__("btsl %1,%0" : "=m"(set) : "Ir"(20) : "cc");

when with tcc compiled with the HAVE_SELINUX option, run with
tcc -run, it would use large addresses far beyond the 32bits
range when tcc did not use the pc-relative mode for accessing
'set' in global data memory.  In fact the assembler did not
know about %rip at all.

Changes:
- memory operands use (%rax) not (%eax)
- conversion from VT_LLOCAL: use type VT_PTR
- support 'k' modifier
- support %rip register
- support X(%rip) pc-relative addresses

The test in tcctest.c is from Michael Matz.
2016-11-20 14:50:56 +01:00
Christian Jullien 70dec93f2b OpenBSD does not support -v option in rm command. 2016-10-15 14:59:52 +02:00
grischka ed15cddacd tccgen: 32bits: fix PTR +/- long long
Previously in order to perform a ll+ll operation tcc
was trying to 'lexpand' PTR in gen_opl which did
not work well.  The case:


    int printf(const char *, ...);
    char t[] = "012345678";

    int main(void)
    {
        char *data = t;
        unsigned long long r = 4;
        unsigned a = 5;
        unsigned long long b = 12;

        *(unsigned*)(data + r) += a - b;

        printf("data %s\n", data);
        return 0;
    }
2016-10-13 19:21:43 +02:00
Christian Jullien 8986bc8af4 Use ISO C string functions instead of obsolete BSD ones that used to be in strings.h. It allows more systems -- i.e. Windows -- to use those tests 2016-10-12 06:18:38 +02:00
grischka 71b16f4e18 tccpp : "tcc -E -P" : suppress empty lines
Also:
- regenerate all tests/pp/*.expect with gcc
- test "insert one space" feature
- test "0x1E-1" in asm mode case
- PARSE_FLAG_SPACES: ignore \f\v\r better
- tcc.h: move some things
2016-10-09 20:33:14 +02:00
grischka b691585785 tccgen: arm/i386: save_reg_upstack
tccgen.c:gv() when loading long long from lvalue, before
was saving all registers which caused problems in the arm
function call register parameter preparation, as with

    void foo(long long y, int x);
    int main(void)
    {
      unsigned int *xx[1], x;
      unsigned long long *yy[1], y;
      foo(**yy, **xx);
      return 0;
    }

Now only the modified register is saved if necessary,
as in this case where it is used to store the result
of the post-inc:

        long long *p, v, **pp;
        v = 1;
        p = &v;
        p[0]++;
        printf("another long long spill test : %lld\n", *p);

i386-gen.c :
- found a similar problem with TOK_UMULL caused by the
  vstack juggle in tccgen:gen_opl()
  (bug seen only when using EBX as 4th register)
2016-10-04 17:36:51 +02:00
Pavlas, Zdenek da63695cf3 switch: fix label sorting 2016-10-03 00:43:28 -07:00
grischka c2ad11ac70 tccgen: fix long long -> char/short cast
This was causing assembler bugs in a tcc compiled by itself
at i386-asm.c:352 when ExprValue.v was changed to uint64_t:

    if (op->e.v == (int8_t)op->e.v)
        op->type |= OP_IM8S;

A general test case:

    #include <stdio.h>
    int main(int argc, char **argv)
    {
        long long ll = 4000;
        int i = (char)ll;
        printf("%d\n", i);
        return 0;
    }

Output was "4000", now "-96".

Also: add "asmtest2" as asmtest with tcc compiled by itself
2016-10-02 01:39:14 +02:00
Balazs Kezes 49d3118621 Incorrect function call code on ARMv6
On 2016-08-11 09:24 +0100, Balazs Kezes wrote:
> I think it's just that that copy_params() never restores the spilled
> registers. Maybe it needs some extra code at the end to see if any
> parameters have been spilled to stack and then restore them?

I've spent some time on this and I've found an alternative solution.
Although I'm not entirely sure about it but I've attached a patch
nevertheless.

And while poking at that I've found another problem affecting the
unsigned long long division on arm and I've attached a patch for that
too.

More details in the patches themselves. Please review and consider them
for merging! Thank you!

--
Balazs

[PATCH 1/2] Fix slow unsigned long long division on ARM

The macro AEABI_UXDIVMOD expands to this bit:

  #define AEABI_UXDIVMOD(name,type, rettype, typemacro)                     \
  ...
      while (num >= den) {                                                  \
  ...
          while ((q << 1) * den <= num && q * den <= typemacro ## _MAX / 2) \
              q <<= 1;                                                      \
  ...

With the current ULONG_MAX version the inner loop goes only until 4
billion so the outer loop will progress very slowly if num is large.
With ULLONG_MAX the inner loop works as expected. The current version is
probably a result of a typo.

The following bash snippet demonstrates the bug:

  $ uname -a
  Linux eper 4.4.16-2-ARCH #1 Wed Aug 10 20:03:13 MDT 2016 armv6l GNU/Linux
  $ cat div.c
  int printf(const char *, ...);
  int main(void) {
    unsigned long long num, denom;
    num = 12345678901234567ULL;
    denom = 7;
    printf("%lld\n", num / denom);
    return 0;
  }
  $ time tcc -run div.c
  1763668414462081

  real    0m16.291s
  user    0m15.860s
  sys     0m0.020s

[PATCH 2/2] Fix long long dereference during argument passing on ARMv6

For some reason the code spills the register to the stack. copy_params
in arm-gen.c doesn't expect this so bad code is generated. It's not
entirely clear why the saving part is necessary. It was added in commit
59c35638 with the comment "fixed long long code gen bug" with no further
clarification. Given that tcctest.c passes without this, maybe it's no
longer needed? Let's remove it.

Also add a new testcase just for this. After I've managed to make the
tests compile on a raspberry pi, I get the following diff without this
patch:

  --- test.ref    2016-08-22 22:12:43.380000000 +0100
  +++ test.out3   2016-08-22 22:12:49.990000000 +0100
  @@ -499,7 +499,7 @@
   2
   1 0 1 0
   4886718345
  -shift: 9 9 9312
  +shift: 291 291 291
   shiftc: 36 36 2328
   shiftc: 0 0 9998683865088
   manyarg_test:

More discussion on this thread:
https://lists.nongnu.org/archive/html/tinycc-devel/2016-08/msg00004.html
2016-10-01 23:10:11 +02:00
grischka afdbc5b815 build: restore out-of-tree support 2016-10-01 21:06:53 +02:00
grischka 0a624782df build: revert Makefiles to 0.9.26 state (mostly)
Except
- that libtcc1.a is now installed in subdirs i386/ etc.
- the support for arm and arm64
- some of the "Darwin" fixes
- tests are mosly unchanged

Also
- removed the "legacy links for cross compilers" (was total mess)
- removed "out-of-tree" build support (was broken anyway)
2016-10-01 21:06:33 +02:00
grischka 6d2be31b93 test/pp: cleanup 2016-10-01 21:05:42 +02:00
grischka 8637c1d0ad Remove misc. files
- from win32/include/winapi: various .h

  The winapi header set cannot be complete no matter what.  So
  lets have just the minimal set necessary to compile the examples.

- remove CMake support (hard to keep up to date)
- some other files

Also, drop useless changes in win32/lib/(win)crt1.c
2016-10-01 20:27:41 +02:00
Christian Jullien e38f49e32a Fix test for __*LP*__ predefined macros 2016-09-25 12:13:17 +02:00
Christian Jullien e91ce66dad Add test for __*LP*__ predefined macros 2016-09-25 12:01:10 +02:00
grischka 41349948f8 win64: fix va_arg
fixes 5c35ba66c5

Implementation was consistent within tcc but incompatible
with the ABI (for example library functions vprintf etc)

Also:
- tccpp.c/get_tok_str() : avoid "unknown format "%llu" warning
- x86_64_gen.c/gen_vla_alloc() : fix vstack leak
2016-07-10 20:44:49 +02:00
Michael Matz f2a4cb0a0e x86-asm: Reject some invalid arith imm8 instruction
There were two errors in the arithmetic imm8 instruction.  They accept
only REGW, and in case the user write a xxxb opcode that variant
needs to be rejected as well (it's not automatically rejected by REGW
in case the destination is memory).
2016-05-16 05:10:21 +02:00
Michael Matz 7cfd21440b x86-asm: Add .fill test 2016-05-14 04:41:06 +02:00
Michael Matz 4f27e217a8 x86-asm: Fix signed constants and opcode order
Two things: negative constants were rejected (e.g. "add $-15,%eax").
Second the insn order was such that the arithmetic IM8S forms
weren't used (always the IM32 ones).  Switching them prefers those
but requires a fix for size calculation in case the opcodes were
OPC_ARITH and OPC_WLX (whose size starts with 1, not zero).
2016-05-14 04:33:41 +02:00
Michael Matz 6bd8c936e3 x86-64-asm: Add mov[sz]xq opcodes
This adds the zero/sign-extending opcodes with 64bit destinations.
2016-05-12 00:57:02 +02:00
Michael Matz b9f01dffc6 x86-64-asm: Clean up 64bit immediate support
Fix it to actually be able to parse 64bit immediates (enlarge
operand value type).  Then, generally there's no need for accepting
IM64 anywhere, except in the 0xba+r mov opcodes, so OP_IM is
unnecessary, as is OPT_IMNO64.  Improve the generated code a bit
by preferring the 0xc7 opcode for im32->reg64, instead of the
im64->reg64 form (which we therefore hardcode).
2016-05-11 23:47:02 +02:00
Michael Matz f0fa5603cf x86-64: Run asmtest as well
This fixes and activates the asm test that's part of tcctest.c
also on x86-64, requiring a small fix for the 'm' constraint.
2016-05-11 19:00:02 +02:00
Michael Matz 4d68828259 tests: Compile asmtest.S without -m32
Don't hardcode that option, if you want it do make CC="gcc -m32".
The test assembles with -m64 as well now.
2016-05-11 18:58:14 +02:00
Michael Matz 613962e353 x86-64 asm: Remove useless jmp opcode
Also remove the hacky mod/rm byte emission during
disp/imm writing.
2016-05-11 18:56:19 +02:00
Michael Matz bd93dc6923 x86: Improve cmov handling
cmov can accept multi sizes, but is also a OPC_TEST opcode,
deal with this.
2016-05-11 18:54:24 +02:00
Michael Matz 5e47b08dc8 [x86] Fix some asm problems
A bag of assembler fixes, to be either compatible with GAS
(e.g. order of 'test' operands), accept more instructions,
count correct foo{bwlq} variants on x86_64, fix modrm/sib bytes
on x86_64 to not use %rip relative addressing mode, to not use
invalid insns in tests/asmtest.S for x86_64.

Result is that now output of GAS and of tcc on tests/asmtest.S
is mostly the same.
2016-05-09 23:17:47 +02:00