From d5d881d9e946351f00cbc851b965f62553f6e830 Mon Sep 17 00:00:00 2001
From: Michael Matz <matz@suse.de>
Date: Mon, 27 Jun 2016 20:21:57 +0200
Subject: [PATCH] x86-asm: Accept 'q' modifier

In inline extended asm '%q1' refers to the 64bit register of operand 1.
---
 tccasm.c        |  2 +-
 tests/tcctest.c | 11 +++++++++++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/tccasm.c b/tccasm.c
index e8bc357..50fb794 100644
--- a/tccasm.c
+++ b/tccasm.c
@@ -946,7 +946,7 @@ static void subst_asm_operands(ASMOperand *operands, int nb_operands,
             modifier = 0;
             if (*str == 'c' || *str == 'n' ||
                 *str == 'b' || *str == 'w' ||
-                *str == 'h' || *str == 'k')
+                *str == 'h' || *str == 'k' || *str == 'q')
                 modifier = *str++;
             index = find_constraint(operands, nb_operands, str, &str);
             if (index < 0)
diff --git a/tests/tcctest.c b/tests/tcctest.c
index 5851fb4..7fd8171 100644
--- a/tests/tcctest.c
+++ b/tests/tcctest.c
@@ -2584,6 +2584,17 @@ unsigned long mconstraint_test(struct struct1231 *r)
     return ret + a[0];
 }
 
+#ifdef __x86_64__
+int fls64(unsigned long long x)
+{
+  int bitpos = -1;
+  asm("bsrq %1,%q0"
+      : "+r" (bitpos)
+      : "rm" (x));
+  return bitpos + 1;
+}
+#endif
+
 unsigned int set;
 
 void asm_test(void)