forked from Mirrors/tinycc
Reduce the generation of machine code for x86_64, Less of size
jiang
parent
2a8905c93b
commit
515169f21b
8
tcc.h
8
tcc.h
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@ -738,19 +738,21 @@ struct TCCState {
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#define VT_CMP 0x0033 /* the value is stored in processor flags (in vc) */
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#define VT_JMP 0x0034 /* value is the consequence of jmp true (even) */
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#define VT_JMPI 0x0035 /* value is the consequence of jmp false (odd) */
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#define VT_REF 0x0040 /* value is pointer to structure rather than address */
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#define TREG_MEM 0x0040 /* x86_64-gen.c add for tcc.h: The current value can be */
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#define VT_REF 0x0080 /* value is pointer to structure rather than address */
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#define VT_LVAL 0x0100 /* var is an lvalue */
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#define VT_SYM 0x0200 /* a symbol value is added */
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#define VT_MUSTCAST 0x0400 /* value must be casted to be correct (used for
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char/short stored in integer registers) */
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#define VT_MUSTBOUND 0x0800 /* bound checking must be done before
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dereferencing value */
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#define VT_BOUNDED 0x8000 /* value is bounded. The address of the
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bounding function call point is in vc */
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#define VT_LVAL_BYTE 0x1000 /* lvalue is a byte */
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#define VT_LVAL_SHORT 0x2000 /* lvalue is a short */
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#define VT_LVAL_UNSIGNED 0x4000 /* lvalue is unsigned */
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#define VT_LVAL_TYPE (VT_LVAL_BYTE | VT_LVAL_SHORT | VT_LVAL_UNSIGNED)
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#define VT_BOUNDED 0x8000 /* value is bounded. The address of the
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bounding function call point is in vc */
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#define VT_TMP 0x10000
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/* types */
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#define VT_BTYPE 0x000f /* mask for basic type */
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3
tccgen.c
3
tccgen.c
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@ -909,8 +909,9 @@ ST_FUNC int gv(int rc)
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/* one register type load */
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load(r, vtop);
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}
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vtop->r = r;
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vtop->c.ptr_offset = 0;
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}
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vtop->r = r;
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#ifdef TCC_TARGET_C67
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/* uses register pairs for doubles */
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if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE)
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484
x86_64-gen.c
484
x86_64-gen.c
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@ -29,28 +29,38 @@
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/* a register can belong to several classes. The classes must be
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sorted from more general to more precise (see gv2() code which does
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assumptions on it). */
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#define RC_INT 0x0001 /* generic integer register */
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#define RC_FLOAT 0x0002 /* generic float register */
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#define RC_RAX 0x0004
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#define RC_RCX 0x0008
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#define RC_RDX 0x0010
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#define RC_ST0 0x0080 /* only for long double */
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#define RC_R8 0x0100
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#define RC_R9 0x0200
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#define RC_R10 0x0400
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#define RC_R11 0x0800
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#define RC_XMM0 0x1000
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#define RC_XMM1 0x2000
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#define RC_XMM2 0x4000
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#define RC_XMM3 0x8000
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#define RC_XMM4 0x10000
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#define RC_XMM5 0x20000
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#define RC_XMM6 0x40000
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#define RC_XMM7 0x80000
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#define RC_IRET RC_RAX /* function return: integer register */
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#define RC_LRET RC_RDX /* function return: second integer register */
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#define RC_FRET RC_XMM0 /* function return: float register */
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#define RC_QRET RC_XMM1 /* function return: second float register */
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#define RC_INT 0x0001 /* generic integer register */
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#define RC_FLOAT 0x0002 /* generic float register */
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#define RC_RAX 0x0004
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#define RC_RCX 0x0008
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#define RC_RDX 0x0010
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#define RC_ST0 0x0020 /* only for long double */
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#define RC_R8 0x0040
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#define RC_R9 0x0080
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#define RC_XMM0 0x0100
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#define RC_XMM1 0x0200
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#define RC_XMM2 0x0400
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#define RC_XMM3 0x0800
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#define RC_XMM4 0x1000
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#define RC_XMM5 0x2000
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#define RC_XMM6 0x4000
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#define RC_XMM7 0x8000
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#define RC_RSI 0x10000
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#define RC_RDI 0x20000
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#define RC_INT1 0x40000 /* function_pointer */
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#define RC_INT2 0x80000
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#define RC_RBX 0x100000
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#define RC_R10 0x200000
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#define RC_R11 0x400000
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#define RC_R12 0x800000
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#define RC_R13 0x1000000
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#define RC_R14 0x2000000
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#define RC_R15 0x4000000
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#define RC_IRET RC_RAX /* function return: integer register */
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#define RC_LRET RC_RDX /* function return: second integer register */
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#define RC_FRET RC_XMM0 /* function return: float register */
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#define RC_QRET RC_XMM1 /* function return: second float register */
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#define RC_MASK (RC_INT|RC_INT1|RC_INT2|RC_FLOAT)
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/* pretty names for the registers */
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enum {
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@ -58,6 +68,7 @@ enum {
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TREG_RCX = 1,
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TREG_RDX = 2,
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TREG_RSP = 4,
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TREG_ST0 = 5,
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TREG_RSI = 6,
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TREG_RDI = 7,
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@ -75,13 +86,11 @@ enum {
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TREG_XMM6 = 22,
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TREG_XMM7 = 23,
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TREG_ST0 = 24,
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TREG_MEM = 0x20,
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};
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#define REX_BASE(reg) (((reg) >> 3) & 1)
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#define REG_VALUE(reg) ((reg) & 7)
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#define FLAG_GOT 0X01
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/* return registers for function */
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#define REG_IRET TREG_RAX /* single word int return register */
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@ -122,34 +131,30 @@ enum {
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#include <assert.h>
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ST_DATA const int reg_classes[NB_REGS] = {
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/* eax */ RC_INT | RC_RAX,
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/* ecx */ RC_INT | RC_RCX,
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/* edx */ RC_INT | RC_RDX,
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/* eax */ RC_INT|RC_RAX|RC_INT2,
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/* ecx */ RC_INT|RC_RCX|RC_INT2,
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/* edx */ RC_INT|RC_RDX,
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RC_INT|RC_INT1|RC_INT2|RC_RBX,
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0,
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0,
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0,
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0,
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0,
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RC_R8,
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RC_R9,
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RC_R10,
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RC_R11,
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0,
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0,
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0,
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0,
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/* xmm0 */ RC_FLOAT | RC_XMM0,
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/* xmm1 */ RC_FLOAT | RC_XMM1,
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/* xmm2 */ RC_FLOAT | RC_XMM2,
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/* xmm3 */ RC_FLOAT | RC_XMM3,
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/* xmm4 */ RC_FLOAT | RC_XMM4,
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/* xmm5 */ RC_FLOAT | RC_XMM5,
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/* xmm6 an xmm7 are included so gv() can be used on them,
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but they are not tagged with RC_FLOAT because they are
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callee saved on Windows */
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RC_XMM6,
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RC_XMM7,
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/* st0 */ RC_ST0
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/* st0 */ RC_ST0,
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RC_RSI|RC_INT2,
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RC_RDI|RC_INT2,
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RC_INT|RC_R8|RC_INT2,
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RC_INT|RC_R9|RC_INT2,
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RC_INT|RC_INT1|RC_INT2|RC_R10,
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RC_INT|RC_INT1|RC_INT2|RC_R11,
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RC_INT|RC_INT1|RC_INT2|RC_R12,
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RC_INT|RC_INT1|RC_INT2|RC_R13,
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RC_INT|RC_INT1|RC_INT2|RC_R14,
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RC_INT|RC_INT1|RC_INT2|RC_R15,
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/* xmm0 */ RC_FLOAT | RC_XMM0,
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RC_FLOAT|RC_XMM1,
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RC_FLOAT|RC_XMM2,
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RC_FLOAT|RC_XMM3,
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RC_FLOAT|RC_XMM4,
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RC_FLOAT|RC_XMM5,
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RC_FLOAT|RC_XMM6,
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RC_FLOAT|RC_XMM7,
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};
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static unsigned long func_sub_sp_offset;
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@ -324,7 +329,7 @@ static void gen_modrm_impl(int op_reg, int r, Sym *sym, int c, int is_got)
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} else {
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oad(0x85 | op_reg, c);
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}
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} else if ((r & VT_VALMASK) >= TREG_MEM) {
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} else if (r & TREG_MEM) {
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if (c) {
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g(0x80 | op_reg | REG_VALUE(r));
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gen_le32(c);
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@ -1609,39 +1614,42 @@ int gtst(int inv, int t)
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/* generate an integer binary operation */
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void gen_opi(int op)
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{
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int r, fr, opc, c;
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int ll, uu, cc;
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int r, fr, opc, fc, c, ll, uu, cc, tt2;
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fr = vtop[0].r;
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fc = vtop->c.ul;
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ll = is64_type(vtop[-1].type.t);
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uu = (vtop[-1].type.t & VT_UNSIGNED) != 0;
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cc = (vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST;
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cc = (fr & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST;
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tt2 = (fr & (VT_LVAL | VT_LVAL_TYPE)) == VT_LVAL;
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switch(op) {
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case '+':
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case TOK_ADDC1: /* add with carry generation */
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opc = 0;
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gen_op8:
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vswap();
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r = gv(RC_INT);
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vswap();
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if (cc && (!ll || (int)vtop->c.ll == vtop->c.ll)) {
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/* constant case */
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vswap();
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r = gv(RC_INT);
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vswap();
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c = vtop->c.i;
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if (c == (char)c) {
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/* XXX: generate inc and dec for smaller code ? */
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orex(ll, r, 0, 0x83);
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o(0xc0 | (opc << 3) | REG_VALUE(r));
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g(c);
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orex(ll, r, 0, 0x83);
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o(0xc0 + REG_VALUE(r) + opc*8);
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g(c);
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} else {
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orex(ll, r, 0, 0x81);
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oad(0xc0 | (opc << 3) | REG_VALUE(r), c);
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oad(0xc0 + REG_VALUE(r) + opc*8, c);
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}
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} else {
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gv2(RC_INT, RC_INT);
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r = vtop[-1].r;
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fr = vtop[0].r;
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orex(ll, r, fr, (opc << 3) | 0x01);
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o(0xc0 + REG_VALUE(r) + REG_VALUE(fr) * 8);
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if(!tt2)
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fr = gv(RC_INT);
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orex(ll, fr, r, 0x03 + opc*8);
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if(fr >= VT_CONST)
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gen_modrm(r, fr, vtop->sym, fc);
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else
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o(0xc0 + REG_VALUE(fr) + REG_VALUE(r)*8);
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}
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vtop--;
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if (op >= TOK_ULT && op <= TOK_GT) {
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@ -1669,11 +1677,27 @@ void gen_opi(int op)
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opc = 1;
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goto gen_op8;
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case '*':
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gv2(RC_INT, RC_INT);
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r = vtop[-1].r;
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fr = vtop[0].r;
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orex(ll, fr, r, 0xaf0f); /* imul fr, r */
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o(0xc0 + REG_VALUE(fr) + REG_VALUE(r) * 8);
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opc = 5;
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vswap();
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r = gv(RC_INT);
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vswap();
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if(!tt2)
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fr = gv(RC_INT);
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if(r == TREG_RAX){
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if(fr != TREG_RDX)
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save_reg(TREG_RDX);
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orex(ll, fr, r, 0xf7);
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if(fr >= VT_CONST)
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gen_modrm(opc, fr, vtop->sym, fc);
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else
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o(0xc0 + REG_VALUE(fr) + opc*8);
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}else{
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orex(ll, fr, r, 0xaf0f); /* imul fr, r */
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if(fr >= VT_CONST)
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gen_modrm(r, fr, vtop->sym, fc);
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else
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o(0xc0 + REG_VALUE(fr) + REG_VALUE(r)*8);
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}
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vtop--;
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break;
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case TOK_SHL:
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@ -1685,47 +1709,62 @@ void gen_opi(int op)
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case TOK_SAR:
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opc = 7;
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gen_shift:
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opc = 0xc0 | (opc << 3);
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if (cc) {
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/* constant case */
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vswap();
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r = gv(RC_INT);
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vswap();
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orex(ll, r, 0, 0xc1); /* shl/shr/sar $xxx, r */
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o(opc | REG_VALUE(r));
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g(vtop->c.i & (ll ? 63 : 31));
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c = vtop->c.i;
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if(c == 1){
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orex(ll, r, 0, 0xd1);
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o(0xc0 + REG_VALUE(r) + opc*8);
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}else{
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orex(ll, r, 0, 0xc1); /* shl/shr/sar $xxx, r */
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o(0xc0 + REG_VALUE(r) + opc*8);
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g(c & (ll ? 0x3f : 0x1f));
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}
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} else {
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/* we generate the shift in ecx */
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gv2(RC_INT, RC_RCX);
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r = vtop[-1].r;
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orex(ll, r, 0, 0xd3); /* shl/shr/sar %cl, r */
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o(opc | REG_VALUE(r));
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o(0xc0 + REG_VALUE(r) + opc*8);
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}
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vtop--;
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break;
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case TOK_UDIV:
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case TOK_UMOD:
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opc = 6;
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uu = 1;
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goto divmod;
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case '/':
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case '%':
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case TOK_PDIV:
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opc = 7;
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uu = 0;
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divmod:
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/* first operand must be in eax */
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/* XXX: need better constraint for second operand */
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gv2(RC_RAX, RC_RCX);
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r = vtop[-1].r;
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fr = vtop[0].r;
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vtop--;
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save_reg(TREG_RDX);
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orex(ll, 0, 0, uu ? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
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orex(ll, fr, 0, 0xf7); /* div fr, %eax */
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o((uu ? 0xf0 : 0xf8) + REG_VALUE(fr));
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if(!tt2){
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gv2(RC_RAX, RC_INT2);
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fr = vtop[0].r;
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}else{
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vswap();
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gv(RC_RAX);
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vswap();
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}
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save_reg(TREG_RDX);
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orex(ll, 0, 0, uu ? 0xd231 : 0x99); /* xor %edx,%edx : cdq RDX:RAX <- sign-extend of RAX. */
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orex(ll, fr, 0, 0xf7); /* div fr, %eax */
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if(fr >= VT_CONST)
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gen_modrm(opc, fr, vtop->sym, fc);
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else
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o(0xc0 + REG_VALUE(fr) + opc*8);
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if (op == '%' || op == TOK_UMOD)
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r = TREG_RDX;
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else
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r = TREG_RAX;
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vtop--;
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vtop->r = r;
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break;
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default:
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@ -1744,9 +1783,8 @@ void gen_opl(int op)
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/* XXX: need to use ST1 too */
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void gen_opf(int op)
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{
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int a, ft, fc, swapped, r;
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int float_type =
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(vtop->type.t & VT_BTYPE) == VT_LDOUBLE ? RC_ST0 : RC_FLOAT;
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int a, ft, fc, swapped, fr, r;
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int float_type = (vtop->type.t & VT_BTYPE) == VT_LDOUBLE ? RC_ST0 : RC_FLOAT;
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/* convert constants to memory references */
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if ((vtop[-1].r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
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@ -1757,21 +1795,23 @@ void gen_opf(int op)
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if ((vtop[0].r & (VT_VALMASK | VT_LVAL)) == VT_CONST)
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gv(float_type);
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/* must put at least one value in the floating point register */
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if ((vtop[-1].r & VT_LVAL) &&
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(vtop[0].r & VT_LVAL)) {
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vswap();
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gv(float_type);
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vswap();
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}
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swapped = 0;
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/* swap the stack if needed so that t1 is the register and t2 is
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the memory reference */
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if (vtop[-1].r & VT_LVAL) {
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vswap();
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swapped = 1;
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}
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if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
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swapped = 0;
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fc = vtop->c.ul;
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ft = vtop->type.t;
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if ((ft & VT_BTYPE) == VT_LDOUBLE) {
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/* swap the stack if needed so that t1 is the register and t2 is
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the memory reference */
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/* must put at least one value in the floating point register */
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if ((vtop[-1].r & VT_LVAL) && (vtop[0].r & VT_LVAL)) {
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vswap();
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gv(float_type);
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vswap();
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}
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if (vtop[-1].r & VT_LVAL) {
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vswap();
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swapped = 1;
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}
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if (op >= TOK_ULT && op <= TOK_GT) {
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/* load on stack second operand */
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load(TREG_ST0, vtop);
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@ -1782,10 +1822,10 @@ void gen_opf(int op)
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swapped = 0;
|
||||
if (swapped)
|
||||
o(0xc9d9); /* fxch %st(1) */
|
||||
if (op == TOK_EQ || op == TOK_NE)
|
||||
o(0xe9da); /* fucompp */
|
||||
else
|
||||
o(0xd9de); /* fcompp */
|
||||
if (op == TOK_EQ || op == TOK_NE)
|
||||
o(0xe9da); /* fucompp */
|
||||
else
|
||||
o(0xd9de); /* fcompp */
|
||||
o(0xe0df); /* fnstsw %ax */
|
||||
if (op == TOK_EQ) {
|
||||
o(0x45e480); /* and $0x45, %ah */
|
||||
|
|
@ -1808,7 +1848,6 @@ void gen_opf(int op)
|
|||
/* no memory reference possible for long double operations */
|
||||
load(TREG_ST0, vtop);
|
||||
swapped = !swapped;
|
||||
|
||||
switch(op) {
|
||||
default:
|
||||
case '+':
|
||||
|
|
@ -1828,63 +1867,45 @@ void gen_opf(int op)
|
|||
a++;
|
||||
break;
|
||||
}
|
||||
ft = vtop->type.t;
|
||||
fc = vtop->c.ul;
|
||||
o(0xde); /* fxxxp %st, %st(1) */
|
||||
o(0xc1 + (a << 3));
|
||||
vtop--;
|
||||
}
|
||||
} else {
|
||||
vswap();
|
||||
gv(float_type);
|
||||
vswap();
|
||||
fr = vtop->r;
|
||||
r = vtop[-1].r;
|
||||
if (op >= TOK_ULT && op <= TOK_GT) {
|
||||
/* if saved lvalue, then we must reload it */
|
||||
r = vtop->r;
|
||||
fc = vtop->c.ul;
|
||||
if ((r & VT_VALMASK) == VT_LLOCAL) {
|
||||
SValue v1;
|
||||
r = get_reg(RC_INT);
|
||||
v1.type.t = VT_PTR;
|
||||
v1.r = VT_LOCAL | VT_LVAL;
|
||||
v1.c.ul = fc;
|
||||
load(r, &v1);
|
||||
fc = 0;
|
||||
}
|
||||
|
||||
if (op == TOK_EQ || op == TOK_NE) {
|
||||
swapped = 0;
|
||||
} else {
|
||||
if (op == TOK_LE || op == TOK_LT)
|
||||
swapped = !swapped;
|
||||
if (op == TOK_LE || op == TOK_GE) {
|
||||
op = 0x93; /* setae */
|
||||
} else {
|
||||
op = 0x97; /* seta */
|
||||
}
|
||||
}
|
||||
|
||||
if (swapped) {
|
||||
gv(RC_FLOAT);
|
||||
vswap();
|
||||
}
|
||||
assert(!(vtop[-1].r & VT_LVAL));
|
||||
|
||||
if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE)
|
||||
o(0x66);
|
||||
if (op == TOK_EQ || op == TOK_NE)
|
||||
o(0x2e0f); /* ucomisd */
|
||||
else
|
||||
o(0x2f0f); /* comisd */
|
||||
|
||||
if (vtop->r & VT_LVAL) {
|
||||
gen_modrm(vtop[-1].r, r, vtop->sym, fc);
|
||||
} else {
|
||||
o(0xc0 + REG_VALUE(vtop[0].r) + REG_VALUE(vtop[-1].r)*8);
|
||||
}
|
||||
|
||||
switch(op){
|
||||
case TOK_LE:
|
||||
op = TOK_ULE; /* setae */
|
||||
break;
|
||||
case TOK_LT:
|
||||
op = TOK_ULT;
|
||||
break;
|
||||
case TOK_GE:
|
||||
op = TOK_UGE;
|
||||
break;
|
||||
case TOK_GT:
|
||||
op = TOK_UGT; /* seta */
|
||||
break;
|
||||
}
|
||||
assert(!(vtop[-1].r & VT_LVAL));
|
||||
if ((ft & VT_BTYPE) == VT_DOUBLE)
|
||||
o(0x66);
|
||||
o(0x2e0f); /* ucomisd */
|
||||
if(fr >= VT_CONST)
|
||||
gen_modrm(r, fr, vtop->sym, fc);
|
||||
else
|
||||
o(0xc0 + REG_VALUE(fr) + REG_VALUE(r)*8);
|
||||
vtop--;
|
||||
vtop->r = VT_CMP;
|
||||
vtop->c.i = op | 0x100;
|
||||
} else {
|
||||
assert((vtop->type.t & VT_BTYPE) != VT_LDOUBLE);
|
||||
assert((vtop->type.t & VT_BTYPE) != VT_LDOUBLE);
|
||||
/* no memory reference possible for long double operations */
|
||||
switch(op) {
|
||||
default:
|
||||
case '+':
|
||||
|
|
@ -1900,44 +1921,20 @@ void gen_opf(int op)
|
|||
a = 6;
|
||||
break;
|
||||
}
|
||||
ft = vtop->type.t;
|
||||
fc = vtop->c.ul;
|
||||
assert((ft & VT_BTYPE) != VT_LDOUBLE);
|
||||
|
||||
r = vtop->r;
|
||||
/* if saved lvalue, then we must reload it */
|
||||
if ((vtop->r & VT_VALMASK) == VT_LLOCAL) {
|
||||
SValue v1;
|
||||
r = get_reg(RC_INT);
|
||||
v1.type.t = VT_PTR;
|
||||
v1.r = VT_LOCAL | VT_LVAL;
|
||||
v1.c.ul = fc;
|
||||
load(r, &v1);
|
||||
fc = 0;
|
||||
}
|
||||
|
||||
assert(!(vtop[-1].r & VT_LVAL));
|
||||
if (swapped) {
|
||||
assert(vtop->r & VT_LVAL);
|
||||
gv(RC_FLOAT);
|
||||
vswap();
|
||||
}
|
||||
|
||||
if ((ft & VT_BTYPE) == VT_DOUBLE) {
|
||||
o(0xf2);
|
||||
} else {
|
||||
o(0xf3);
|
||||
}
|
||||
o(0x0f);
|
||||
o(0x58 + a);
|
||||
|
||||
if (vtop->r & VT_LVAL) {
|
||||
gen_modrm(vtop[-1].r, r, vtop->sym, fc);
|
||||
} else {
|
||||
o(0xc0 + REG_VALUE(vtop[0].r) + REG_VALUE(vtop[-1].r)*8);
|
||||
}
|
||||
|
||||
vtop--;
|
||||
assert((ft & VT_BTYPE) != VT_LDOUBLE);
|
||||
assert(!(vtop[-1].r & VT_LVAL));
|
||||
if ((ft & VT_BTYPE) == VT_DOUBLE) {
|
||||
o(0xf2);
|
||||
} else {
|
||||
o(0xf3);
|
||||
}
|
||||
o(0x0f);
|
||||
o(0x58 + a);
|
||||
if(fr >= VT_CONST)
|
||||
gen_modrm(r, fr, vtop->sym, fc);
|
||||
else
|
||||
o(0xc0 + REG_VALUE(fr) + REG_VALUE(r)*8);
|
||||
vtop--;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -1946,103 +1943,96 @@ void gen_opf(int op)
|
|||
and 'long long' cases. */
|
||||
void gen_cvt_itof(int t)
|
||||
{
|
||||
if ((t & VT_BTYPE) == VT_LDOUBLE) {
|
||||
int ft, bt, tbt, r;
|
||||
|
||||
ft = vtop->type.t;
|
||||
bt = ft & VT_BTYPE;
|
||||
tbt = t & VT_BTYPE;
|
||||
r = gv(RC_INT);
|
||||
|
||||
if (tbt == VT_LDOUBLE) {
|
||||
save_reg(TREG_ST0);
|
||||
gv(RC_INT);
|
||||
if ((vtop->type.t & VT_BTYPE) == VT_LLONG) {
|
||||
if ((ft & VT_BTYPE) == VT_LLONG) {
|
||||
/* signed long long to float/double/long double (unsigned case
|
||||
is handled generically) */
|
||||
o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
|
||||
o(0x50 + REG_VALUE(r)); /* push r */
|
||||
o(0x242cdf); /* fildll (%rsp) */
|
||||
o(0x08c48348); /* add $8, %rsp */
|
||||
} else if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
|
||||
(VT_INT | VT_UNSIGNED)) {
|
||||
} else if ((ft & (VT_BTYPE | VT_UNSIGNED)) == (VT_INT | VT_UNSIGNED)) {
|
||||
/* unsigned int to float/double/long double */
|
||||
o(0x6a); /* push $0 */
|
||||
g(0x00);
|
||||
o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
|
||||
o(0x50 + REG_VALUE(r)); /* push r */
|
||||
o(0x242cdf); /* fildll (%rsp) */
|
||||
o(0x10c48348); /* add $16, %rsp */
|
||||
} else {
|
||||
/* int to float/double/long double */
|
||||
o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
|
||||
o(0x50 + REG_VALUE(r)); /* push r */
|
||||
o(0x2404db); /* fildl (%rsp) */
|
||||
o(0x08c48348); /* add $8, %rsp */
|
||||
}
|
||||
vtop->r = TREG_ST0;
|
||||
} else {
|
||||
int r = get_reg(RC_FLOAT);
|
||||
gv(RC_INT);
|
||||
o(0xf2 + ((t & VT_BTYPE) == VT_FLOAT?1:0));
|
||||
if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
|
||||
(VT_INT | VT_UNSIGNED) ||
|
||||
(vtop->type.t & VT_BTYPE) == VT_LLONG) {
|
||||
int r_xmm;
|
||||
r_xmm = get_reg(RC_FLOAT);
|
||||
o(0xf2 + (tbt == VT_FLOAT));
|
||||
if ((ft & (VT_BTYPE | VT_UNSIGNED)) == (VT_INT | VT_UNSIGNED) || bt == VT_LLONG) {
|
||||
o(0x48); /* REX */
|
||||
}
|
||||
o(0x2a0f);
|
||||
o(0xc0 + (vtop->r & VT_VALMASK) + REG_VALUE(r)*8); /* cvtsi2sd */
|
||||
vtop->r = r;
|
||||
o(0xc0 + REG_VALUE(r) + REG_VALUE(r_xmm)*8); /* cvtsi2sd or cvtsi2ss */
|
||||
vtop->r = r_xmm;
|
||||
}
|
||||
}
|
||||
|
||||
/* convert from one floating point type to another */
|
||||
void gen_cvt_ftof(int t)
|
||||
{
|
||||
int ft, bt, tbt;
|
||||
int ft, bt, tbt, r;
|
||||
|
||||
ft = vtop->type.t;
|
||||
bt = ft & VT_BTYPE;
|
||||
tbt = t & VT_BTYPE;
|
||||
|
||||
if (bt == VT_FLOAT) {
|
||||
gv(RC_FLOAT);
|
||||
|
||||
if(bt == VT_LDOUBLE)
|
||||
r = get_reg(RC_FLOAT);
|
||||
else
|
||||
r = gv(RC_FLOAT);
|
||||
if (bt == VT_FLOAT) {
|
||||
if (tbt == VT_DOUBLE) {
|
||||
o(0x140f); /* unpcklps */
|
||||
o(0xc0 + REG_VALUE(vtop->r)*9);
|
||||
o(0x5a0f); /* cvtps2pd */
|
||||
o(0xc0 + REG_VALUE(vtop->r)*9);
|
||||
o(0xc0 + REG_VALUE(r) + REG_VALUE(r) * 8);
|
||||
} else if (tbt == VT_LDOUBLE) {
|
||||
save_reg(RC_ST0);
|
||||
/* movss %xmm0,-0x10(%rsp) */
|
||||
/* movss %xmm0-7,-0x10(%rsp) */
|
||||
o(0x110ff3);
|
||||
o(0x44 + REG_VALUE(vtop->r)*8);
|
||||
o(0xf024);
|
||||
o(0xf02444 + REG_VALUE(r)*8);
|
||||
o(0xf02444d9); /* flds -0x10(%rsp) */
|
||||
vtop->r = TREG_ST0;
|
||||
}
|
||||
} else if (bt == VT_DOUBLE) {
|
||||
gv(RC_FLOAT);
|
||||
if (tbt == VT_FLOAT) {
|
||||
o(0x140f66); /* unpcklpd */
|
||||
o(0xc0 + REG_VALUE(vtop->r)*9);
|
||||
o(0x5a0f66); /* cvtpd2ps */
|
||||
o(0xc0 + REG_VALUE(vtop->r)*9);
|
||||
o(0xc0 + REG_VALUE(r) + REG_VALUE(r) * 8);
|
||||
} else if (tbt == VT_LDOUBLE) {
|
||||
save_reg(RC_ST0);
|
||||
/* movsd %xmm0,-0x10(%rsp) */
|
||||
/* movsd %xmm0-7,-0x10(%rsp) */
|
||||
o(0x110ff2);
|
||||
o(0x44 + REG_VALUE(vtop->r)*8);
|
||||
o(0xf024);
|
||||
o(0xf02444 + REG_VALUE(r)*8);
|
||||
o(0xf02444dd); /* fldl -0x10(%rsp) */
|
||||
vtop->r = TREG_ST0;
|
||||
}
|
||||
} else {
|
||||
int r;
|
||||
gv(RC_ST0);
|
||||
r = get_reg(RC_FLOAT);
|
||||
if (tbt == VT_DOUBLE) {
|
||||
o(0xf0245cdd); /* fstpl -0x10(%rsp) */
|
||||
/* movsd -0x10(%rsp),%xmm0 */
|
||||
/* movsd -0x10(%rsp),%xmm0-7 */
|
||||
o(0x100ff2);
|
||||
o(0x44 + REG_VALUE(r)*8);
|
||||
o(0xf024);
|
||||
o(0xf02444 + REG_VALUE(r)*8);
|
||||
vtop->r = r;
|
||||
} else if (tbt == VT_FLOAT) {
|
||||
o(0xf0245cd9); /* fstps -0x10(%rsp) */
|
||||
/* movss -0x10(%rsp),%xmm0 */
|
||||
/* movss -0x10(%rsp),%xmm0-7 */
|
||||
o(0x100ff3);
|
||||
o(0x44 + REG_VALUE(r)*8);
|
||||
o(0xf024);
|
||||
o(0xf02444 + REG_VALUE(r)*8);
|
||||
vtop->r = r;
|
||||
}
|
||||
}
|
||||
|
|
@ -2051,20 +2041,20 @@ void gen_cvt_ftof(int t)
|
|||
/* convert fp to int 't' type */
|
||||
void gen_cvt_ftoi(int t)
|
||||
{
|
||||
int ft, bt, size, r;
|
||||
int ft, bt, ll, r, r_xmm;
|
||||
|
||||
ft = vtop->type.t;
|
||||
bt = ft & VT_BTYPE;
|
||||
|
||||
if (bt == VT_LDOUBLE) {
|
||||
gen_cvt_ftof(VT_DOUBLE);
|
||||
bt = VT_DOUBLE;
|
||||
}
|
||||
|
||||
gv(RC_FLOAT);
|
||||
if (t != VT_INT)
|
||||
size = 8;
|
||||
r_xmm = gv(RC_FLOAT);
|
||||
if ((t & VT_BTYPE) == VT_INT)
|
||||
ll = 0;
|
||||
else
|
||||
size = 4;
|
||||
|
||||
ll = 1;
|
||||
r = get_reg(RC_INT);
|
||||
if (bt == VT_FLOAT) {
|
||||
o(0xf3);
|
||||
|
|
@ -2073,8 +2063,8 @@ void gen_cvt_ftoi(int t)
|
|||
} else {
|
||||
assert(0);
|
||||
}
|
||||
orex(size == 8, r, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
|
||||
o(0xc0 + REG_VALUE(vtop->r) + REG_VALUE(r)*8);
|
||||
orex(ll, r, r_xmm, 0x2c0f); /* cvttss2si or cvttsd2si */
|
||||
o(0xc0 + REG_VALUE(r_xmm) + (REG_VALUE(r) << 3));
|
||||
vtop->r = r;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue