forked from Mirrors/wine-wine
919 lines
30 KiB
C
919 lines
30 KiB
C
/*
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* Emulation of privileged instructions
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*
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* Copyright 1995 Alexandre Julliard
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* Copyright 2005 Ivan Leo Puoti
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* Copyright 2005 Laurent Pinchart
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
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*/
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#include <stdarg.h>
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#include "windef.h"
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#include "winbase.h"
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#include "winternl.h"
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#include "wine/winuser16.h"
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#include "excpt.h"
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#include "wine/debug.h"
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#include "kernel16_private.h"
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#include "dosexe.h"
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#include "wine/exception.h"
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WINE_DEFAULT_DEBUG_CHANNEL(int);
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WINE_DECLARE_DEBUG_CHANNEL(io);
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/* macros to set parts of a DWORD */
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#define SET_LOWORD(dw,val) ((dw) = ((dw) & 0xffff0000) | LOWORD(val))
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#define SET_LOBYTE(dw,val) ((dw) = ((dw) & 0xffffff00) | LOBYTE(val))
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#define ADD_LOWORD(dw,val) ((dw) = ((dw) & 0xffff0000) | LOWORD((DWORD)(dw)+(val)))
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static inline void add_stack( CONTEXT *context, int offset )
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{
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if (!IS_SELECTOR_32BIT(context->SegSs))
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ADD_LOWORD( context->Esp, offset );
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else
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context->Esp += offset;
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}
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static inline void *make_ptr( CONTEXT *context, DWORD seg, DWORD off, int long_addr )
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{
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if (ldt_is_system(seg)) return (void *)off;
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if (!long_addr) off = LOWORD(off);
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return (char *) MapSL( MAKESEGPTR( seg, 0 ) ) + off;
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}
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static inline void *get_stack( CONTEXT *context )
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{
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return ldt_get_ptr( context->SegSs, context->Esp );
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}
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#include "pshpack1.h"
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struct idtr
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{
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WORD limit;
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BYTE *base;
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};
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#include "poppack.h"
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static LDT_ENTRY idt[256];
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static inline struct idtr get_idtr(void)
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{
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struct idtr ret;
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#if defined(__i386__) && defined(__GNUC__)
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__asm__( "sidtl %0" : "=m" (ret) );
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#else
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ret.base = (BYTE *)idt;
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ret.limit = sizeof(idt) - 1;
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#endif
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return ret;
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}
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/***********************************************************************
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* INSTR_ReplaceSelector
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*
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* Try to replace an invalid selector by a valid one.
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* The only selector where it is allowed to do "mov ax,40;mov es,ax"
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* is the so called 'bimodal' selector 0x40, which points to the BIOS
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* data segment. Used by (at least) Borland products (and programs compiled
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* using Borland products).
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*
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* See Undocumented Windows, Chapter 5, __0040.
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*/
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static BOOL INSTR_ReplaceSelector( CONTEXT *context, WORD *sel )
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{
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if (*sel == 0x40)
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{
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DOSVM_start_bios_timer();
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*sel = DOSMEM_BiosDataSeg;
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return TRUE;
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}
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return FALSE; /* Can't replace selector, crashdump */
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}
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/* store an operand into a register */
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static void store_reg_word( CONTEXT *context, BYTE regmodrm, const BYTE *addr, int long_op )
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{
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switch((regmodrm >> 3) & 7)
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{
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case 0:
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if (long_op) context->Eax = *(const DWORD *)addr;
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else SET_LOWORD(context->Eax, *(const WORD *)addr);
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break;
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case 1:
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if (long_op) context->Ecx = *(const DWORD *)addr;
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else SET_LOWORD(context->Ecx, *(const WORD *)addr);
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break;
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case 2:
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if (long_op) context->Edx = *(const DWORD *)addr;
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else SET_LOWORD(context->Edx, *(const WORD *)addr);
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break;
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case 3:
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if (long_op) context->Ebx = *(const DWORD *)addr;
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else SET_LOWORD(context->Ebx, *(const WORD *)addr);
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break;
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case 4:
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if (long_op) context->Esp = *(const DWORD *)addr;
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else SET_LOWORD(context->Esp, *(const WORD *)addr);
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break;
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case 5:
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if (long_op) context->Ebp = *(const DWORD *)addr;
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else SET_LOWORD(context->Ebp, *(const WORD *)addr);
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break;
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case 6:
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if (long_op) context->Esi = *(const DWORD *)addr;
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else SET_LOWORD(context->Esi, *(const WORD *)addr);
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break;
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case 7:
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if (long_op) context->Edi = *(const DWORD *)addr;
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else SET_LOWORD(context->Edi, *(const WORD *)addr);
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break;
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}
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}
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/* store an operand into a byte register */
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static void store_reg_byte( CONTEXT *context, BYTE regmodrm, const BYTE *addr )
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{
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switch((regmodrm >> 3) & 7)
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{
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case 0: context->Eax = (context->Eax & 0xffffff00) | *addr; break;
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case 1: context->Ecx = (context->Ecx & 0xffffff00) | *addr; break;
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case 2: context->Edx = (context->Edx & 0xffffff00) | *addr; break;
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case 3: context->Ebx = (context->Ebx & 0xffffff00) | *addr; break;
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case 4: context->Eax = (context->Eax & 0xffff00ff) | (*addr << 8); break;
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case 5: context->Ecx = (context->Ecx & 0xffff00ff) | (*addr << 8); break;
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case 6: context->Edx = (context->Edx & 0xffff00ff) | (*addr << 8); break;
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case 7: context->Ebx = (context->Ebx & 0xffff00ff) | (*addr << 8); break;
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}
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}
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/***********************************************************************
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* INSTR_GetOperandAddr
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*
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* Return the address of an instruction operand (from the mod/rm byte).
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*/
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static BYTE *INSTR_GetOperandAddr( CONTEXT *context, BYTE *instr,
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int long_addr, int segprefix, int *len )
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{
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int mod, rm, base = 0, index = 0, ss = 0, seg = 0, off;
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#define GET_VAL(val,type) \
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{ *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
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*len = 0;
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GET_VAL( &mod, BYTE );
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rm = mod & 7;
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mod >>= 6;
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if (mod == 3)
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{
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switch(rm)
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{
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case 0: return (BYTE *)&context->Eax;
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case 1: return (BYTE *)&context->Ecx;
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case 2: return (BYTE *)&context->Edx;
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case 3: return (BYTE *)&context->Ebx;
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case 4: return (BYTE *)&context->Esp;
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case 5: return (BYTE *)&context->Ebp;
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case 6: return (BYTE *)&context->Esi;
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case 7: return (BYTE *)&context->Edi;
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}
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}
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if (long_addr)
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{
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if (rm == 4)
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{
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BYTE sib;
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GET_VAL( &sib, BYTE );
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rm = sib & 7;
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ss = sib >> 6;
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switch((sib >> 3) & 7)
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{
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case 0: index = context->Eax; break;
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case 1: index = context->Ecx; break;
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case 2: index = context->Edx; break;
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case 3: index = context->Ebx; break;
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case 4: index = 0; break;
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case 5: index = context->Ebp; break;
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case 6: index = context->Esi; break;
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case 7: index = context->Edi; break;
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}
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}
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switch(rm)
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{
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case 0: base = context->Eax; seg = context->SegDs; break;
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case 1: base = context->Ecx; seg = context->SegDs; break;
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case 2: base = context->Edx; seg = context->SegDs; break;
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case 3: base = context->Ebx; seg = context->SegDs; break;
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case 4: base = context->Esp; seg = context->SegSs; break;
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case 5: base = context->Ebp; seg = context->SegSs; break;
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case 6: base = context->Esi; seg = context->SegDs; break;
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case 7: base = context->Edi; seg = context->SegDs; break;
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}
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switch (mod)
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{
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case 0:
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if (rm == 5) /* special case: ds:(disp32) */
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{
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GET_VAL( &base, DWORD );
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seg = context->SegDs;
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}
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break;
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case 1: /* 8-bit disp */
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GET_VAL( &off, BYTE );
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base += (signed char)off;
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break;
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case 2: /* 32-bit disp */
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GET_VAL( &off, DWORD );
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base += (signed long)off;
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break;
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}
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}
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else /* short address */
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{
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switch(rm)
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{
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case 0: /* ds:(bx,si) */
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base = LOWORD(context->Ebx) + LOWORD(context->Esi);
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seg = context->SegDs;
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break;
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case 1: /* ds:(bx,di) */
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base = LOWORD(context->Ebx) + LOWORD(context->Edi);
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seg = context->SegDs;
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break;
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case 2: /* ss:(bp,si) */
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base = LOWORD(context->Ebp) + LOWORD(context->Esi);
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seg = context->SegSs;
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break;
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case 3: /* ss:(bp,di) */
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base = LOWORD(context->Ebp) + LOWORD(context->Edi);
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seg = context->SegSs;
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break;
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case 4: /* ds:(si) */
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base = LOWORD(context->Esi);
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seg = context->SegDs;
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break;
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case 5: /* ds:(di) */
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base = LOWORD(context->Edi);
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seg = context->SegDs;
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break;
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case 6: /* ss:(bp) */
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base = LOWORD(context->Ebp);
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seg = context->SegSs;
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break;
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case 7: /* ds:(bx) */
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base = LOWORD(context->Ebx);
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seg = context->SegDs;
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break;
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}
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switch(mod)
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{
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case 0:
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if (rm == 6) /* special case: ds:(disp16) */
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{
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GET_VAL( &base, WORD );
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seg = context->SegDs;
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}
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break;
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case 1: /* 8-bit disp */
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GET_VAL( &off, BYTE );
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base += (signed char)off;
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break;
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case 2: /* 16-bit disp */
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GET_VAL( &off, WORD );
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base += (signed short)off;
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break;
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}
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base &= 0xffff;
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}
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if (segprefix != -1) seg = segprefix;
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/* Make sure the segment and offset are valid */
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if (ldt_is_system(seg)) return (BYTE *)(base + (index << ss));
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if ((seg & 7) != 7) return NULL;
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if (!ldt_is_valid( seg )) return NULL;
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if (ldt_get_limit( seg ) < (base + (index << ss))) return NULL;
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return (BYTE *)ldt_get_base( seg ) + base + (index << ss);
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#undef GET_VAL
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}
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/***********************************************************************
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* INSTR_EmulateLDS
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*
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* Emulate the LDS (and LES,LFS,etc.) instruction.
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*/
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static BOOL INSTR_EmulateLDS( CONTEXT *context, BYTE *instr, int long_op,
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int long_addr, int segprefix, int *len )
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{
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WORD seg;
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BYTE *regmodrm = instr + 1 + (*instr == 0x0f);
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BYTE *addr = INSTR_GetOperandAddr( context, regmodrm,
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long_addr, segprefix, len );
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if (!addr)
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return FALSE; /* Unable to emulate it */
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seg = *(WORD *)(addr + (long_op ? 4 : 2));
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if (!INSTR_ReplaceSelector( context, &seg ))
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return FALSE; /* Unable to emulate it */
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/* Now store the offset in the correct register */
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store_reg_word( context, *regmodrm, addr, long_op );
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/* Store the correct segment in the segment register */
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switch(*instr)
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{
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case 0xc4: context->SegEs = seg; break; /* les */
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case 0xc5: context->SegDs = seg; break; /* lds */
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case 0x0f: switch(instr[1])
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{
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case 0xb2: context->SegSs = seg; break; /* lss */
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case 0xb4: context->SegFs = seg; break; /* lfs */
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case 0xb5: context->SegGs = seg; break; /* lgs */
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}
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break;
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}
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/* Add the opcode size to the total length */
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*len += 1 + (*instr == 0x0f);
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return TRUE;
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}
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/***********************************************************************
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* INSTR_inport
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*
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* input on an I/O port
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*/
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static DWORD INSTR_inport( WORD port, int size, CONTEXT *context )
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{
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DWORD res = DOSVM_inport( port, size );
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if (TRACE_ON(io))
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{
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switch(size)
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{
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case 1:
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TRACE_(io)( "0x%x < %02x @ %04x:%04x\n", port, LOBYTE(res),
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(WORD)context->SegCs, LOWORD(context->Eip));
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break;
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case 2:
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TRACE_(io)( "0x%x < %04x @ %04x:%04x\n", port, LOWORD(res),
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(WORD)context->SegCs, LOWORD(context->Eip));
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break;
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case 4:
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TRACE_(io)( "0x%x < %08x @ %04x:%04x\n", port, res,
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(WORD)context->SegCs, LOWORD(context->Eip));
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break;
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}
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}
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return res;
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}
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/***********************************************************************
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* INSTR_outport
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*
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* output on an I/O port
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*/
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static void INSTR_outport( WORD port, int size, DWORD val, CONTEXT *context )
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{
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DOSVM_outport( port, size, val );
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if (TRACE_ON(io))
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{
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switch(size)
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{
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case 1:
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TRACE_(io)("0x%x > %02x @ %04x:%04x\n", port, LOBYTE(val),
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(WORD)context->SegCs, LOWORD(context->Eip));
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break;
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case 2:
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TRACE_(io)("0x%x > %04x @ %04x:%04x\n", port, LOWORD(val),
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(WORD)context->SegCs, LOWORD(context->Eip));
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break;
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case 4:
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TRACE_(io)("0x%x > %08x @ %04x:%04x\n", port, val,
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(WORD)context->SegCs, LOWORD(context->Eip));
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break;
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}
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}
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}
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|
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/***********************************************************************
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* __wine_emulate_instruction
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*
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* Emulate a privileged instruction.
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* Returns exception continuation status.
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*/
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DWORD __wine_emulate_instruction( EXCEPTION_RECORD *rec, CONTEXT *context )
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{
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int prefix, segprefix, prefixlen, len, repX, long_op, long_addr;
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BYTE *instr;
|
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long_op = long_addr = IS_SELECTOR_32BIT(context->SegCs);
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instr = make_ptr( context, context->SegCs, context->Eip, TRUE );
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if (!instr) return ExceptionContinueSearch;
|
|
|
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/* First handle any possible prefix */
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|
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segprefix = -1; /* no prefix */
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prefix = 1;
|
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repX = 0;
|
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prefixlen = 0;
|
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while(prefix)
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{
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switch(*instr)
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{
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case 0x2e:
|
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segprefix = context->SegCs;
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break;
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case 0x36:
|
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segprefix = context->SegSs;
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break;
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case 0x3e:
|
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segprefix = context->SegDs;
|
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break;
|
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case 0x26:
|
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segprefix = context->SegEs;
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break;
|
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case 0x64:
|
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segprefix = context->SegFs;
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break;
|
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case 0x65:
|
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segprefix = context->SegGs;
|
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break;
|
|
case 0x66:
|
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long_op = !long_op; /* opcode size prefix */
|
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break;
|
|
case 0x67:
|
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long_addr = !long_addr; /* addr size prefix */
|
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break;
|
|
case 0xf0: /* lock */
|
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break;
|
|
case 0xf2: /* repne */
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repX = 1;
|
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break;
|
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case 0xf3: /* repe */
|
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repX = 2;
|
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break;
|
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default:
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prefix = 0; /* no more prefixes */
|
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break;
|
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}
|
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if (prefix)
|
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{
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instr++;
|
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prefixlen++;
|
|
}
|
|
}
|
|
|
|
/* Now look at the actual instruction */
|
|
|
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switch(*instr)
|
|
{
|
|
case 0x07: /* pop es */
|
|
case 0x17: /* pop ss */
|
|
case 0x1f: /* pop ds */
|
|
{
|
|
WORD seg = *(WORD *)get_stack( context );
|
|
if (INSTR_ReplaceSelector( context, &seg ))
|
|
{
|
|
switch(*instr)
|
|
{
|
|
case 0x07: context->SegEs = seg; break;
|
|
case 0x17: context->SegSs = seg; break;
|
|
case 0x1f: context->SegDs = seg; break;
|
|
}
|
|
add_stack(context, long_op ? 4 : 2);
|
|
context->Eip += prefixlen + 1;
|
|
return ExceptionContinueExecution;
|
|
}
|
|
}
|
|
break; /* Unable to emulate it */
|
|
|
|
case 0x0f: /* extended instruction */
|
|
switch(instr[1])
|
|
{
|
|
case 0x22: /* mov %eax, %crX */
|
|
switch (instr[2])
|
|
{
|
|
case 0xc0:
|
|
FIXME("mov %%eax, %%cr0 at 0x%08x, EAX=0x%08x\n",
|
|
context->Eip,context->Eax );
|
|
context->Eip += prefixlen+3;
|
|
return ExceptionContinueExecution;
|
|
default:
|
|
break; /* Fallthrough to bad instruction handling */
|
|
}
|
|
break; /* Fallthrough to bad instruction handling */
|
|
case 0x20: /* mov %crX, %eax */
|
|
switch (instr[2])
|
|
{
|
|
case 0xe0: /* mov %cr4, %eax */
|
|
/* CR4 register: See linux/arch/i386/mm/init.c, X86_CR4_ defs
|
|
* bit 0: VME Virtual Mode Exception ?
|
|
* bit 1: PVI Protected mode Virtual Interrupt
|
|
* bit 2: TSD Timestamp disable
|
|
* bit 3: DE Debugging extensions
|
|
* bit 4: PSE Page size extensions
|
|
* bit 5: PAE Physical address extension
|
|
* bit 6: MCE Machine check enable
|
|
* bit 7: PGE Enable global pages
|
|
* bit 8: PCE Enable performance counters at IPL3
|
|
*/
|
|
FIXME("mov %%cr4, %%eax at 0x%08x\n",context->Eip);
|
|
context->Eax = 0;
|
|
context->Eip += prefixlen+3;
|
|
return ExceptionContinueExecution;
|
|
case 0xc0: /* mov %cr0, %eax */
|
|
FIXME("mov %%cr0, %%eax at 0x%08x\n",context->Eip);
|
|
context->Eax = 0x10; /* FIXME: set more bits ? */
|
|
context->Eip += prefixlen+3;
|
|
return ExceptionContinueExecution;
|
|
default: /* Fallthrough to illegal instruction */
|
|
break;
|
|
}
|
|
/* Fallthrough to illegal instruction */
|
|
break;
|
|
case 0x21: /* mov %drX, %eax */
|
|
switch (instr[2])
|
|
{
|
|
case 0xc8: /* mov %dr1, %eax */
|
|
TRACE("mov %%dr1, %%eax at 0x%08x\n",context->Eip);
|
|
context->Eax = context->Dr1;
|
|
context->Eip += prefixlen+3;
|
|
return ExceptionContinueExecution;
|
|
case 0xf8: /* mov %dr7, %eax */
|
|
TRACE("mov %%dr7, %%eax at 0x%08x\n",context->Eip);
|
|
context->Eax = 0x400;
|
|
context->Eip += prefixlen+3;
|
|
return ExceptionContinueExecution;
|
|
}
|
|
FIXME("Unsupported DR register, eip+2 is %02x\n", instr[2]);
|
|
/* fallthrough to illegal instruction */
|
|
break;
|
|
case 0x23: /* mov %eax, %drX */
|
|
switch (instr[2])
|
|
{
|
|
case 0xc8: /* mov %eax, %dr1 */
|
|
context->Dr1 = context->Eax;
|
|
context->Eip += prefixlen+3;
|
|
return ExceptionContinueExecution;
|
|
}
|
|
FIXME("Unsupported DR register, eip+2 is %02x\n", instr[2]);
|
|
/* fallthrough to illegal instruction */
|
|
break;
|
|
case 0xa1: /* pop fs */
|
|
{
|
|
WORD seg = *(WORD *)get_stack( context );
|
|
if (INSTR_ReplaceSelector( context, &seg ))
|
|
{
|
|
context->SegFs = seg;
|
|
add_stack(context, long_op ? 4 : 2);
|
|
context->Eip += prefixlen + 2;
|
|
return ExceptionContinueExecution;
|
|
}
|
|
}
|
|
break;
|
|
case 0xa9: /* pop gs */
|
|
{
|
|
WORD seg = *(WORD *)get_stack( context );
|
|
if (INSTR_ReplaceSelector( context, &seg ))
|
|
{
|
|
context->SegGs = seg;
|
|
add_stack(context, long_op ? 4 : 2);
|
|
context->Eip += prefixlen + 2;
|
|
return ExceptionContinueExecution;
|
|
}
|
|
}
|
|
break;
|
|
case 0xb2: /* lss addr,reg */
|
|
case 0xb4: /* lfs addr,reg */
|
|
case 0xb5: /* lgs addr,reg */
|
|
if (INSTR_EmulateLDS( context, instr, long_op,
|
|
long_addr, segprefix, &len ))
|
|
{
|
|
context->Eip += prefixlen + len;
|
|
return ExceptionContinueExecution;
|
|
}
|
|
break;
|
|
}
|
|
break; /* Unable to emulate it */
|
|
|
|
case 0x6c: /* insb */
|
|
case 0x6d: /* insw/d */
|
|
case 0x6e: /* outsb */
|
|
case 0x6f: /* outsw/d */
|
|
{
|
|
int typ = *instr; /* Just in case it's overwritten. */
|
|
int outp = (typ >= 0x6e);
|
|
unsigned long count = repX ?
|
|
(long_addr ? context->Ecx : LOWORD(context->Ecx)) : 1;
|
|
int opsize = (typ & 1) ? (long_op ? 4 : 2) : 1;
|
|
int step = (context->EFlags & 0x400) ? -opsize : +opsize;
|
|
int seg;
|
|
|
|
if (outp)
|
|
{
|
|
/* Check if there is a segment prefix override and honour it */
|
|
seg = segprefix == -1 ? context->SegDs : segprefix;
|
|
/* FIXME: Check segment is readable. */
|
|
}
|
|
else
|
|
{
|
|
seg = context->SegEs;
|
|
/* FIXME: Check segment is writable. */
|
|
}
|
|
|
|
if (repX)
|
|
{
|
|
if (long_addr) context->Ecx = 0;
|
|
else SET_LOWORD(context->Ecx,0);
|
|
}
|
|
|
|
while (count-- > 0)
|
|
{
|
|
void *data;
|
|
WORD dx = LOWORD(context->Edx);
|
|
if (outp)
|
|
{
|
|
data = make_ptr( context, seg, context->Esi, long_addr );
|
|
if (long_addr) context->Esi += step;
|
|
else ADD_LOWORD(context->Esi,step);
|
|
}
|
|
else
|
|
{
|
|
data = make_ptr( context, seg, context->Edi, long_addr );
|
|
if (long_addr) context->Edi += step;
|
|
else ADD_LOWORD(context->Edi,step);
|
|
}
|
|
|
|
switch (typ)
|
|
{
|
|
case 0x6c:
|
|
*(BYTE *)data = INSTR_inport( dx, 1, context );
|
|
break;
|
|
case 0x6d:
|
|
if (long_op)
|
|
*(DWORD *)data = INSTR_inport( dx, 4, context );
|
|
else
|
|
*(WORD *)data = INSTR_inport( dx, 2, context );
|
|
break;
|
|
case 0x6e:
|
|
INSTR_outport( dx, 1, *(BYTE *)data, context );
|
|
break;
|
|
case 0x6f:
|
|
if (long_op)
|
|
INSTR_outport( dx, 4, *(DWORD *)data, context );
|
|
else
|
|
INSTR_outport( dx, 2, *(WORD *)data, context );
|
|
break;
|
|
}
|
|
}
|
|
context->Eip += prefixlen + 1;
|
|
}
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0x8a: /* mov Eb, Gb */
|
|
case 0x8b: /* mov Ev, Gv */
|
|
{
|
|
BYTE *data = INSTR_GetOperandAddr(context, instr + 1, long_addr,
|
|
segprefix, &len);
|
|
unsigned int data_size = (*instr == 0x8b) ? (long_op ? 4 : 2) : 1;
|
|
struct idtr idtr = get_idtr();
|
|
unsigned int offset = data - idtr.base;
|
|
|
|
if (offset <= idtr.limit + 1 - data_size)
|
|
{
|
|
idt[1].LimitLow = 0x100; /* FIXME */
|
|
idt[2].LimitLow = 0x11E; /* FIXME */
|
|
idt[3].LimitLow = 0x500; /* FIXME */
|
|
|
|
switch (*instr)
|
|
{
|
|
case 0x8a: store_reg_byte( context, instr[1], (BYTE *)idt + offset ); break;
|
|
case 0x8b: store_reg_word( context, instr[1], (BYTE *)idt + offset, long_op ); break;
|
|
}
|
|
context->Eip += prefixlen + len + 1;
|
|
return ExceptionContinueExecution;
|
|
}
|
|
}
|
|
break; /* Unable to emulate it */
|
|
|
|
case 0x8e: /* mov XX,segment_reg */
|
|
{
|
|
WORD seg;
|
|
BYTE *addr = INSTR_GetOperandAddr(context, instr + 1,
|
|
long_addr, segprefix, &len );
|
|
if (!addr)
|
|
break; /* Unable to emulate it */
|
|
seg = *(WORD *)addr;
|
|
if (!INSTR_ReplaceSelector( context, &seg ))
|
|
break; /* Unable to emulate it */
|
|
|
|
switch((instr[1] >> 3) & 7)
|
|
{
|
|
case 0:
|
|
context->SegEs = seg;
|
|
context->Eip += prefixlen + len + 1;
|
|
return ExceptionContinueExecution;
|
|
case 1: /* cs */
|
|
break;
|
|
case 2:
|
|
context->SegSs = seg;
|
|
context->Eip += prefixlen + len + 1;
|
|
return ExceptionContinueExecution;
|
|
case 3:
|
|
context->SegDs = seg;
|
|
context->Eip += prefixlen + len + 1;
|
|
return ExceptionContinueExecution;
|
|
case 4:
|
|
context->SegFs = seg;
|
|
context->Eip += prefixlen + len + 1;
|
|
return ExceptionContinueExecution;
|
|
case 5:
|
|
context->SegGs = seg;
|
|
context->Eip += prefixlen + len + 1;
|
|
return ExceptionContinueExecution;
|
|
case 6: /* unused */
|
|
case 7: /* unused */
|
|
break;
|
|
}
|
|
}
|
|
break; /* Unable to emulate it */
|
|
|
|
case 0xc4: /* les addr,reg */
|
|
case 0xc5: /* lds addr,reg */
|
|
if (INSTR_EmulateLDS( context, instr, long_op,
|
|
long_addr, segprefix, &len ))
|
|
{
|
|
context->Eip += prefixlen + len;
|
|
return ExceptionContinueExecution;
|
|
}
|
|
break; /* Unable to emulate it */
|
|
|
|
case 0xcd: /* int <XX> */
|
|
context->Eip += prefixlen + 2;
|
|
if (DOSVM_EmulateInterruptPM( context, instr[1] )) return ExceptionContinueExecution;
|
|
context->Eip -= prefixlen + 2; /* restore eip */
|
|
break; /* Unable to emulate it */
|
|
|
|
case 0xcf: /* iret */
|
|
if (ldt_is_system(context->SegCs)) break; /* don't emulate it in 32-bit code */
|
|
if (long_op)
|
|
{
|
|
DWORD *stack = get_stack( context );
|
|
context->Eip = *stack++;
|
|
context->SegCs = *stack++;
|
|
context->EFlags = *stack;
|
|
add_stack(context, 3*sizeof(DWORD)); /* Pop the return address and flags */
|
|
}
|
|
else
|
|
{
|
|
WORD *stack = get_stack( context );
|
|
context->Eip = *stack++;
|
|
context->SegCs = *stack++;
|
|
SET_LOWORD(context->EFlags,*stack);
|
|
add_stack(context, 3*sizeof(WORD)); /* Pop the return address and flags */
|
|
}
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0xe4: /* inb al,XX */
|
|
SET_LOBYTE(context->Eax,INSTR_inport( instr[1], 1, context ));
|
|
context->Eip += prefixlen + 2;
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0xe5: /* in (e)ax,XX */
|
|
if (long_op)
|
|
context->Eax = INSTR_inport( instr[1], 4, context );
|
|
else
|
|
SET_LOWORD(context->Eax, INSTR_inport( instr[1], 2, context ));
|
|
context->Eip += prefixlen + 2;
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0xe6: /* outb XX,al */
|
|
INSTR_outport( instr[1], 1, LOBYTE(context->Eax), context );
|
|
context->Eip += prefixlen + 2;
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0xe7: /* out XX,(e)ax */
|
|
if (long_op)
|
|
INSTR_outport( instr[1], 4, context->Eax, context );
|
|
else
|
|
INSTR_outport( instr[1], 2, LOWORD(context->Eax), context );
|
|
context->Eip += prefixlen + 2;
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0xec: /* inb al,dx */
|
|
SET_LOBYTE(context->Eax, INSTR_inport( LOWORD(context->Edx), 1, context ) );
|
|
context->Eip += prefixlen + 1;
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0xed: /* in (e)ax,dx */
|
|
if (long_op)
|
|
context->Eax = INSTR_inport( LOWORD(context->Edx), 4, context );
|
|
else
|
|
SET_LOWORD(context->Eax, INSTR_inport( LOWORD(context->Edx), 2, context ));
|
|
context->Eip += prefixlen + 1;
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0xee: /* outb dx,al */
|
|
INSTR_outport( LOWORD(context->Edx), 1, LOBYTE(context->Eax), context );
|
|
context->Eip += prefixlen + 1;
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0xef: /* out dx,(e)ax */
|
|
if (long_op)
|
|
INSTR_outport( LOWORD(context->Edx), 4, context->Eax, context );
|
|
else
|
|
INSTR_outport( LOWORD(context->Edx), 2, LOWORD(context->Eax), context );
|
|
context->Eip += prefixlen + 1;
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0xfa: /* cli */
|
|
context->Eip += prefixlen + 1;
|
|
return ExceptionContinueExecution;
|
|
|
|
case 0xfb: /* sti */
|
|
context->Eip += prefixlen + 1;
|
|
return ExceptionContinueExecution;
|
|
}
|
|
return ExceptionContinueSearch; /* Unable to emulate it */
|
|
}
|
|
|
|
|
|
/***********************************************************************
|
|
* INSTR_vectored_handler
|
|
*
|
|
* Vectored exception handler used to emulate protected instructions
|
|
* from 32-bit code.
|
|
*/
|
|
LONG CALLBACK INSTR_vectored_handler( EXCEPTION_POINTERS *ptrs )
|
|
{
|
|
EXCEPTION_RECORD *record = ptrs->ExceptionRecord;
|
|
CONTEXT *context = ptrs->ContextRecord;
|
|
|
|
if (ldt_is_system(context->SegCs) &&
|
|
(record->ExceptionCode == EXCEPTION_ACCESS_VIOLATION ||
|
|
record->ExceptionCode == EXCEPTION_PRIV_INSTRUCTION))
|
|
{
|
|
if (__wine_emulate_instruction( record, context ) == ExceptionContinueExecution)
|
|
return EXCEPTION_CONTINUE_EXECUTION;
|
|
}
|
|
return EXCEPTION_CONTINUE_SEARCH;
|
|
}
|
|
|
|
|
|
/***********************************************************************
|
|
* DOS3Call (KERNEL.102)
|
|
*/
|
|
void WINAPI DOS3Call( CONTEXT *context )
|
|
{
|
|
__wine_call_int_handler( context, 0x21 );
|
|
}
|
|
|
|
|
|
/***********************************************************************
|
|
* NetBIOSCall (KERNEL.103)
|
|
*/
|
|
void WINAPI NetBIOSCall16( CONTEXT *context )
|
|
{
|
|
__wine_call_int_handler( context, 0x5c );
|
|
}
|
|
|
|
|
|
/***********************************************************************
|
|
* GetSetKernelDOSProc (KERNEL.311)
|
|
*/
|
|
FARPROC16 WINAPI GetSetKernelDOSProc16( FARPROC16 DosProc )
|
|
{
|
|
FIXME("(DosProc=%p): stub\n", DosProc);
|
|
return NULL;
|
|
}
|