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server: Add floating point and debug registers to the ARM64 context. 

Signed-off-by: Alexandre Julliard <julliard@winehq.org>
oldstable
Alexandre Julliard 2017-12-05 13:33:38 +01:00
parent 4ba0f628f9
commit d12717b9a8
5 changed files with 77 additions and 34 deletions
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45
dlls/ntdll/signal_arm64.c
View File

@ -251,6 +251,19 @@ static void copy_context( CONTEXT *to, const CONTEXT *from, DWORD flags )
{
memcpy( to->u.X, from->u.X, sizeof(to->u.X) );
}
if (flags & CONTEXT_FLOATING_POINT)
{
memcpy( to->V, from->V, sizeof(to->V) );
to->Fpcr = from->Fpcr;
to->Fpsr = from->Fpsr;
}
if (flags & CONTEXT_DEBUG_REGISTERS)
{
memcpy( to->Bcr, from->Bcr, sizeof(to->Bcr) );
memcpy( to->Bvr, from->Bvr, sizeof(to->Bvr) );
memcpy( to->Wcr, from->Wcr, sizeof(to->Wcr) );
memcpy( to->Wvr, from->Wvr, sizeof(to->Wvr) );
}
}
/***********************************************************************
@ -279,6 +292,21 @@ NTSTATUS context_to_server( context_t *to, const CONTEXT *from )
to->flags |= SERVER_CTX_INTEGER;
for (i = 0; i <= 28; i++) to->integer.arm64_regs.x[i] = from->u.X[i];
}
if (flags & CONTEXT_FLOATING_POINT)
{
to->flags |= SERVER_CTX_FLOATING_POINT;
for (i = 0; i < 64; i++) to->fp.arm64_regs.d[i] = from->V[i / 2].D[i % 2];
to->fp.arm64_regs.fpcr = from->Fpcr;
to->fp.arm64_regs.fpsr = from->Fpsr;
}
if (flags & CONTEXT_DEBUG_REGISTERS)
{
to->flags |= SERVER_CTX_DEBUG_REGISTERS;
for (i = 0; i < ARM64_MAX_BREAKPOINTS; i++) to->debug.arm64_regs.bcr[i] = from->Bcr[i];
for (i = 0; i < ARM64_MAX_BREAKPOINTS; i++) to->debug.arm64_regs.bvr[i] = from->Bvr[i];
for (i = 0; i < ARM64_MAX_WATCHPOINTS; i++) to->debug.arm64_regs.wcr[i] = from->Wcr[i];
for (i = 0; i < ARM64_MAX_WATCHPOINTS; i++) to->debug.arm64_regs.wvr[i] = from->Wvr[i];
}
return STATUS_SUCCESS;
}
@ -308,7 +336,22 @@ NTSTATUS context_from_server( CONTEXT *to, const context_t *from )
{
to->ContextFlags |= CONTEXT_INTEGER;
for (i = 0; i <= 28; i++) to->u.X[i] = from->integer.arm64_regs.x[i];
}
}
if (from->flags & SERVER_CTX_FLOATING_POINT)
{
to->ContextFlags |= CONTEXT_FLOATING_POINT;
for (i = 0; i < 64; i++) to->V[i / 2].D[i % 2] = from->fp.arm64_regs.d[i];
to->Fpcr = from->fp.arm64_regs.fpcr;
to->Fpsr = from->fp.arm64_regs.fpsr;
}
if (from->flags & SERVER_CTX_DEBUG_REGISTERS)
{
to->ContextFlags |= CONTEXT_DEBUG_REGISTERS;
for (i = 0; i < ARM64_MAX_BREAKPOINTS; i++) to->Bcr[i] = from->debug.arm64_regs.bcr[i];
for (i = 0; i < ARM64_MAX_BREAKPOINTS; i++) to->Bvr[i] = from->debug.arm64_regs.bvr[i];
for (i = 0; i < ARM64_MAX_WATCHPOINTS; i++) to->Wcr[i] = from->debug.arm64_regs.wcr[i];
for (i = 0; i < ARM64_MAX_WATCHPOINTS; i++) to->Wvr[i] = from->debug.arm64_regs.wvr[i];
}
return STATUS_SUCCESS;
}

4
include/wine/server_protocol.h
View File

@ -156,6 +156,7 @@ typedef struct
struct { struct { unsigned __int64 low, high; } fpregs[32]; } x86_64_regs;
struct { double fpr[32], fpscr; } powerpc_regs;
struct { unsigned __int64 d[32]; unsigned int fpscr; } arm_regs;
struct { unsigned __int64 d[64]; unsigned int fpcr, fpsr; } arm64_regs;
} fp;
union
{
@ -163,6 +164,7 @@ typedef struct
struct { unsigned __int64 dr0, dr1, dr2, dr3, dr6, dr7; } x86_64_regs;
struct { unsigned int dr[8]; } powerpc_regs;
struct { unsigned int bvr[8], bcr[8], wvr[1], wcr[1]; } arm_regs;
struct { unsigned __int64 bvr[8], wvr[2]; unsigned int bcr[8], wcr[2]; } arm64_regs;
} debug;
union
{
@ -6477,6 +6479,6 @@ union generic_reply
struct terminate_job_reply terminate_job_reply;
};
#define SERVER_PROTOCOL_VERSION 545
#define SERVER_PROTOCOL_VERSION 546
#endif /* __WINE_WINE_SERVER_PROTOCOL_H */

2
server/protocol.def
View File

@ -172,6 +172,7 @@ typedef struct
struct { struct { unsigned __int64 low, high; } fpregs[32]; } x86_64_regs;
struct { double fpr[32], fpscr; } powerpc_regs;
struct { unsigned __int64 d[32]; unsigned int fpscr; } arm_regs;
struct { unsigned __int64 d[64]; unsigned int fpcr, fpsr; } arm64_regs;
} fp; /* selected by SERVER_CTX_FLOATING_POINT */
union
{
@ -179,6 +180,7 @@ typedef struct
struct { unsigned __int64 dr0, dr1, dr2, dr3, dr6, dr7; } x86_64_regs;
struct { unsigned int dr[8]; } powerpc_regs;
struct { unsigned int bvr[8], bcr[8], wvr[1], wcr[1]; } arm_regs;
struct { unsigned __int64 bvr[8], wvr[2]; unsigned int bcr[8], wcr[2]; } arm64_regs;
} debug; /* selected by SERVER_CTX_DEBUG_REGISTERS */
union
{

2
server/thread.c
View File

@ -1148,7 +1148,7 @@ static unsigned int get_context_system_regs( enum cpu_type cpu )
case CPU_x86_64: return SERVER_CTX_DEBUG_REGISTERS;
case CPU_POWERPC: return 0;
case CPU_ARM: return SERVER_CTX_DEBUG_REGISTERS;
case CPU_ARM64: return 0;
case CPU_ARM64: return SERVER_CTX_DEBUG_REGISTERS;
}
return 0;
}

58
server/trace.c
View File

@ -691,37 +691,33 @@ static void dump_varargs_context( const char *prefix, data_size_t size )
}
if (ctx.flags & SERVER_CTX_INTEGER)
{
dump_uint64( ",x0=", &ctx.integer.arm64_regs.x[0] );
dump_uint64( ",x1=", &ctx.integer.arm64_regs.x[1] );
dump_uint64( ",x2=", &ctx.integer.arm64_regs.x[2] );
dump_uint64( ",x3=", &ctx.integer.arm64_regs.x[3] );
dump_uint64( ",x4=", &ctx.integer.arm64_regs.x[4] );
dump_uint64( ",x5=", &ctx.integer.arm64_regs.x[5] );
dump_uint64( ",x6=", &ctx.integer.arm64_regs.x[6] );
dump_uint64( ",x7=", &ctx.integer.arm64_regs.x[7] );
dump_uint64( ",x8=", &ctx.integer.arm64_regs.x[8] );
dump_uint64( ",x9=", &ctx.integer.arm64_regs.x[9] );
dump_uint64( ",x10=", &ctx.integer.arm64_regs.x[10] );
dump_uint64( ",x11=", &ctx.integer.arm64_regs.x[11] );
dump_uint64( ",x12=", &ctx.integer.arm64_regs.x[12] );
dump_uint64( ",x13=", &ctx.integer.arm64_regs.x[13] );
dump_uint64( ",x14=", &ctx.integer.arm64_regs.x[14] );
dump_uint64( ",x15=", &ctx.integer.arm64_regs.x[15] );
dump_uint64( ",x16=", &ctx.integer.arm64_regs.x[16] );
dump_uint64( ",x17=", &ctx.integer.arm64_regs.x[17] );
dump_uint64( ",x18=", &ctx.integer.arm64_regs.x[18] );
dump_uint64( ",x19=", &ctx.integer.arm64_regs.x[19] );
dump_uint64( ",x20=", &ctx.integer.arm64_regs.x[20] );
dump_uint64( ",x21=", &ctx.integer.arm64_regs.x[21] );
dump_uint64( ",x22=", &ctx.integer.arm64_regs.x[22] );
dump_uint64( ",x23=", &ctx.integer.arm64_regs.x[23] );
dump_uint64( ",x24=", &ctx.integer.arm64_regs.x[24] );
dump_uint64( ",x25=", &ctx.integer.arm64_regs.x[25] );
dump_uint64( ",x26=", &ctx.integer.arm64_regs.x[26] );
dump_uint64( ",x27=", &ctx.integer.arm64_regs.x[27] );
dump_uint64( ",x28=", &ctx.integer.arm64_regs.x[28] );
dump_uint64( ",x29=", &ctx.integer.arm64_regs.x[29] );
dump_uint64( ",x30=", &ctx.integer.arm64_regs.x[30] );
for (i = 0; i < 31; i++)
{
fprintf( stderr, ",x%u=", i );
dump_uint64( "", &ctx.integer.arm64_regs.x[i] );
}
}
if (ctx.flags & SERVER_CTX_DEBUG_REGISTERS)
{
for (i = 0; i < 8; i++)
{
fprintf( stderr, ",bcr%u=%08x,bvr%u=", i, ctx.debug.arm64_regs.bcr[i], i );
dump_uint64( "", &ctx.debug.arm64_regs.bvr[i] );
}
for (i = 0; i < 2; i++)
{
fprintf( stderr, ",wcr%u=%08x,wvr%u=", i, ctx.debug.arm64_regs.wcr[i], i );
dump_uint64( "", &ctx.debug.arm64_regs.wvr[i] );
}
}
if (ctx.flags & SERVER_CTX_FLOATING_POINT)
{
for (i = 0; i < 64; i++)
{
fprintf( stderr, ",d%u=", i );
dump_uint64( "", &ctx.fp.arm64_regs.d[i] );
}
fprintf( stderr, ",fpcr=%08x,fpsr=%08x", ctx.fp.arm64_regs.fpcr, ctx.fp.arm64_regs.fpsr );
}
break;
}