d3dx9: Support ps_2_0-style dcl instruction in the shader assembler.

oldstable
Matteo Bruni 2010-06-08 00:50:57 +02:00 committed by Alexandre Julliard
parent 9a8ffc916c
commit 00951f84ed
4 changed files with 82 additions and 13 deletions

View File

@ -133,6 +133,25 @@ static void asmparser_dcl_input(struct asm_parser *This, DWORD usage, DWORD num,
}
}
static void asmparser_dcl_input_ps_2(struct asm_parser *This, DWORD usage, DWORD num,
DWORD mod, const struct shader_reg *reg) {
struct instruction instr;
if(!This->shader) return;
if(usage != 0) {
asmparser_message(This, "Line %u: Unsupported usage in dcl instruction\n", This->line_no);
set_parse_status(This, PARSE_ERR);
return;
}
instr.dstmod = mod;
instr.shift = 0;
This->funcs->dstreg(This, &instr, reg);
if(!record_declaration(This->shader, usage, num, mod, FALSE, instr.dst.regnum, instr.dst.writemask, FALSE)) {
ERR("Out of memory\n");
set_parse_status(This, PARSE_ERR);
}
}
static void asmparser_dcl_sampler(struct asm_parser *This, DWORD samptype,
DWORD mod, DWORD regnum,
unsigned int line_no) {
@ -811,7 +830,7 @@ static const struct asmparser_backend parser_ps_2 = {
asmparser_coissue_unsupported,
asmparser_dcl_output,
asmparser_dcl_input,
asmparser_dcl_input_ps_2,
asmparser_dcl_sampler,
asmparser_end,
@ -831,7 +850,7 @@ static const struct asmparser_backend parser_ps_2_x = {
asmparser_coissue_unsupported,
asmparser_dcl_output,
asmparser_dcl_input,
asmparser_dcl_input_ps_2,
asmparser_dcl_sampler,
asmparser_end,

View File

@ -573,6 +573,40 @@ instruction: INSTR_ADD omods dreg ',' sregs
reg.writemask = $5;
asm_ctx.funcs->dcl_input(&asm_ctx, $2.dclusage, $2.regnum, $3.mod, &reg);
}
| INSTR_DCL omods REG_INPUT
{
struct shader_reg reg;
TRACE("Input reg declaration\n");
if($2.shift != 0) {
asmparser_message(&asm_ctx, "Line %u: Shift modifier not allowed here\n",
asm_ctx.line_no);
set_parse_status(&asm_ctx, PARSE_ERR);
}
ZeroMemory(&reg, sizeof(reg));
reg.type = BWRITERSPR_INPUT;
reg.regnum = $3;
reg.rel_reg = NULL;
reg.srcmod = 0;
reg.writemask = BWRITERSP_WRITEMASK_ALL;
asm_ctx.funcs->dcl_input(&asm_ctx, 0, 0, $2.mod, &reg);
}
| INSTR_DCL omods REG_INPUT writemask
{
struct shader_reg reg;
TRACE("Input reg declaration\n");
if($2.shift != 0) {
asmparser_message(&asm_ctx, "Line %u: Shift modifier not allowed here\n",
asm_ctx.line_no);
set_parse_status(&asm_ctx, PARSE_ERR);
}
ZeroMemory(&reg, sizeof(reg));
reg.type = BWRITERSPR_INPUT;
reg.regnum = $3;
reg.rel_reg = NULL;
reg.srcmod = 0;
reg.writemask = $4;
asm_ctx.funcs->dcl_input(&asm_ctx, 0, 0, $2.mod, &reg);
}
| INSTR_DCL sampdcl omods REG_SAMPLER
{
TRACE("Sampler declared\n");

View File

@ -343,11 +343,15 @@ static void put_dword(struct bytecode_buffer *buffer, DWORD value) {
/******************************************************
* Implementation of the writer functions starts here *
******************************************************/
static void write_declarations(struct bytecode_buffer *buffer, BOOL len,
static void write_declarations(struct bc_writer *This,
struct bytecode_buffer *buffer, BOOL len,
const struct declaration *decls, unsigned int num, DWORD type) {
DWORD i;
DWORD instr_dcl = D3DSIO_DCL;
DWORD token;
struct shader_reg reg;
ZeroMemory(&reg, sizeof(reg));
if(len) {
instr_dcl |= 2 << D3DSI_INSTLENGTH_SHIFT;
@ -366,12 +370,10 @@ static void write_declarations(struct bytecode_buffer *buffer, BOOL len,
put_dword(buffer, token);
/* Write the dest register */
token = (1 << 31); /* Bit 31 of non-instruction opcodes is 1 */
token |= (type << D3DSP_REGTYPE_SHIFT) & D3DSP_REGTYPE_MASK;
token |= (d3d9_writemask(decls[i].writemask)) & D3DSP_WRITEMASK_ALL;
token |= decls[i].regnum & D3DSP_REGNUM_MASK;
token |= d3d9_dstmod(decls[i].mod);
put_dword(buffer, token);
reg.type = type;
reg.regnum = decls[i].regnum;
reg.writemask = decls[i].writemask;
This->funcs->dstreg(This, &reg, buffer, 0, decls[i].mod);
}
}
@ -514,7 +516,7 @@ static void vs_1_x_header(struct bc_writer *This, const struct bwriter_shader *s
/* Declare the shader type and version */
put_dword(buffer, This->version);
write_declarations(buffer, FALSE, shader->inputs, shader->num_inputs, D3DSPR_INPUT);
write_declarations(This, buffer, FALSE, shader->inputs, shader->num_inputs, BWRITERSPR_INPUT);
write_constF(shader, buffer, FALSE);
return;
}
@ -908,7 +910,7 @@ static void vs_2_header(struct bc_writer *This,
/* Declare the shader type and version */
put_dword(buffer, This->version);
write_declarations(buffer, TRUE, shader->inputs, shader->num_inputs, D3DSPR_INPUT);
write_declarations(This, buffer, TRUE, shader->inputs, shader->num_inputs, BWRITERSPR_INPUT);
write_constF(shader, buffer, TRUE);
write_constB(shader, buffer, TRUE);
write_constI(shader, buffer, TRUE);
@ -1187,6 +1189,7 @@ static void ps_2_header(struct bc_writer *This, const struct bwriter_shader *sha
/* Declare the shader type and version */
put_dword(buffer, This->version);
write_declarations(This, buffer, TRUE, shader->inputs, shader->num_inputs, BWRITERSPR_INPUT);
write_samplers(shader, buffer);
write_constF(shader, buffer, TRUE);
write_constB(shader, buffer, TRUE);
@ -1424,8 +1427,8 @@ static void sm_3_header(struct bc_writer *This, const struct bwriter_shader *sha
/* Declare the shader type and version */
put_dword(buffer, This->version);
write_declarations(buffer, TRUE, shader->inputs, shader->num_inputs, D3DSPR_INPUT);
write_declarations(buffer, TRUE, shader->outputs, shader->num_outputs, D3DSPR_OUTPUT);
write_declarations(This, buffer, TRUE, shader->inputs, shader->num_inputs, BWRITERSPR_INPUT);
write_declarations(This, buffer, TRUE, shader->outputs, shader->num_outputs, BWRITERSPR_OUTPUT);
write_constF(shader, buffer, TRUE);
write_constB(shader, buffer, TRUE);
write_constI(shader, buffer, TRUE);

View File

@ -886,6 +886,11 @@ static void ps_2_0_test(void) {
{0xffff0200, 0x0200001f, 0x90000000, 0xa00f0802, 0x03020042, 0x800f0000,
0xb0e40001, 0xa0e40802, 0x0000ffff}
},
{ /* shader 11 */
"ps_2_0\n"
"dcl v0\n",
{0xffff0200, 0x0200001f, 0x80000000, 0x900f0000, 0x0000ffff}
},
};
exec_tests("ps_2_0", tests, sizeof(tests) / sizeof(tests[0]));
@ -1195,6 +1200,11 @@ static void ps_3_0_test(void) {
"dcl_2d_pp s0\n",
{0xffff0300, 0x0200001f, 0x90000000, 0xa02f0800, 0x0000ffff}
},
{ /* shader 15 */
"ps_3_0\n"
"dcl v0\n",
{0xffff0300, 0x0200001f, 0x80000000, 0x900f0000, 0x0000ffff}
},
};
exec_tests("ps_3_0", tests, sizeof(tests) / sizeof(tests[0]));
@ -1336,6 +1346,9 @@ static void failure_test(void) {
/* shader 42: no modifiers with vs dcl sampler instruction */
"vs_3_0\n"
"dcl_2d_pp s0\n",
/* shader 43: can't explicitely declare input registers in ps_2_0 */
"ps_2_0\n"
"dcl_texcoord0 t0\n",
};
HRESULT hr;
unsigned int i;